Table 45:" />
參數(shù)資料
型號(hào): XC5VLX220-2FF1760I
廠(chǎng)商: Xilinx Inc
文件頁(yè)數(shù): 16/91頁(yè)
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-5 220K 1760FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 17280
邏輯元件/單元數(shù): 221184
RAM 位總計(jì): 7077888
輸入/輸出數(shù): 800
電源電壓: 0.95 V ~ 1.05 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1760-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1760-FCBGA
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
23
Table 45: GTX_DUAL Tile User Clock Switching Characteristics(1)
Symbol
Description
Conditions
Device
Speed Grade
Units
-3
-2
-1
FTXOUT
TXOUTCLK maximum frequency
Internal 20-bit datapath
FXT
325
212.5
MHz
TXT
-
325
212.5
MHz
Internal 16-bit datapath
FXT
406.25
265.625
MHz
TXT
-
406.25
265.625
MHz
FRXREC
RXRECCLK maximum frequency
FXT
406.25
265.625
MHz
TXT
-
406.25
265.625
MHz
TRX
RXUSRCLK maximum frequency
FXT
406.25
265.625
MHz
TXT
-
406.25
265.625
MHz
TRX2
RXUSRCLK2 maximum frequency
1 byte interface
FXT
375
312.5
235.625
MHz
2 byte interface
406.25
390.625
265.625
MHz
4 byte interface
203.125
132.813
MHz
1 byte interface
TXT
-
312.5
235.625
MHz
2 byte interface
-
265.625
MHz
4 byte interface
-
203.125
132.813
MHz
TTX
TXUSRCLK maximum frequency
FXT
406.25
265.625
MHz
TXT
-
406.25
265.625
MHz
TTX2
TXUSRCLK2 maximum frequency
1 byte interface
FXT
375
312.5
235.625
MHz
2 byte interface
406.25
390.625
265.625
MHz
4 byte interface
203.125
132.813
MHz
1 byte interface
TXT
-
312.5
235.625
MHz
2 byte interface
-
265.625
MHz
4 byte interface
-
203.125
132.813
MHz
Notes:
1.
Clocking must be implemented as described in UG198: Virtex-5 FPGA RocketIO GTX Transceiver User Guide.
Table 46: GTX_DUAL Tile Transmitter Switching Characteristics
Symbol
Description
Condition
Min
Typ
Max
Units
FGTXTX
Serial data rate range
0.15
FGTXMAX
Gb/s
TRTX
TX Rise time
20%–80%
120
ps
TFTX
TX Fall time
80%–20%
120
ps
TLLSKEW
TX lane-to-lane skew(1)
350
ps
VTXOOBVDPP
Electrical idle amplitude
15
mV
TTXOOBTRANSITION
Electrical idle transition time
75
ns
TJ6.5
Total Jitter(2)
6.5 Gb/s
0.33
UI
DJ6.5
Deterministic Jitter(2)
0.17
UI
TJ5.0
Total Jitter(2)
5.0 Gb/s
0.33
UI
DJ5.0
Deterministic Jitter(2)
0.15
UI
TJ4.25
Total Jitter(2)
4.25 Gb/s
0.33
UI
DJ4.25
Deterministic Jitter(2)
0.14
UI
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