參數(shù)資料
型號(hào)： XCF16PFSG48C
廠商： Xilinx Inc
文件頁(yè)數(shù)： 23/35頁(yè)
文件大?。?/td> 0K
描述： IC PROM SRL 1.8V 16M 48CSBGA
產(chǎn)品變化通告： Package Assemble Change 01/Jan/2007
標(biāo)準(zhǔn)包裝： 108
可編程類(lèi)型： 系統(tǒng)內(nèi)可編程
存儲(chǔ)容量： 16Mb
電源電壓： 1.65 V ~ 2 V
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-BFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 48-CSP（8x9）
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 601 (CN2011-ZH PDF)
其它名稱(chēng)： 122-1455
Platform Flash In-System Programmable Configuration PROMs
DS123 (v2.18) May 19, 2010
Product Specification
3
R
See UG161, Platform Flash PROM User Guide, for detailed
guidelines on PROM-to-FPGA configuration hardware
connections, for software usage, for a reference list of Xilinx
FPGAs, and for the respective compatible Platform Flash
PROMs. Table 2 lists the Platform Flash PROMs and their
capacities.
Programming
The Platform Flash PROM is a reprogrammable NOR flash
page 14 for the program/erase specifications).
Reprogramming requires an erase followed by a program
operation. A verify operation is recommended after the
program operation to validate the correct transfer of data
from the programmer source to the Platform Flash PROM.
Several programming solutions are available.
In-System Programming
In-System Programmable PROMs can be programmed
individually, or two or more can be daisy-chained together
and programmed in-system via the standard 4-pin JTAG
protocol as shown in Figure 3.
In-system programming offers quick and efficient design
iterations and eliminates unnecessary package handling or
socketing of devices. The programming data sequence is
delivered to the device using either Xilinx iMPACT software
and a Xilinx download cable, a third-party JTAG
development system, a JTAG-compatible board tester, or a
simple microprocessor interface that emulates the JTAG
instruction sequence. The iMPACT software also outputs
serial vector format (SVF) files for use with any tools that
accept SVF format, including automatic test equipment.
During in-system programming, the CEO output is driven
High. All other outputs are held in a high-impedance state or
held at clamp levels during in-system programming. All
non-JTAG input pins are ignored during in-system
programming, including CLK, CE, CF, OE/RESET, BUSY,
EN_EXT_SEL, and REV_SEL[1:0]. In-system programming
is fully supported across the recommended operating
voltage and temperature ranges.
Embedded, in-system programming reference designs,
such as XAPP058, Xilinx In-System Programming Using an
Embedded Microcontroller, are available on the Xilinx web
Notes. See UG161, Platform Flash PROM User Guide, for
an advanced update methodology that uses the Design
Revisioning feature in the Platform Flash XCFxxP PROMs.
OE/RESET
The 1/2/4 Mb XCFxxS Platform Flash PROMs in-system
programming algorithm results in issuance of an internal
device reset that causes OE/RESET to pulse Low.
External Programming
In traditional manufacturing environments, third-party
device programmers can program Platform Flash PROMs
with an initial memory image before the PROMs are
assembled onto boards. Contact a preferred third-party
programmer vendor for Platform Flash PROM support
information. A sample list of third-party programmer
vendors with Platform Flash PROM support is available on
the Xilinx web page for Third-Party Programmer Device
Support. See UG161, Platform Flash PROM User Guide,
for the PROM data file format required for programmers.
Pre-programmed PROMs can be assembled onto boards
using the typical soldering process guidelines in UG112,
Device Package User Guide. A pre-programmed PROM’s
memory image can be updated after board assembly using
an in-system programming solution.
Reliability and Endurance
Xilinx in-system programmable products provide a
guaranteed endurance level of 20,000 in-system
program-erase cycles and a minimum data retention of 20
years. Each device meets all functional, performance, and
data retention specifications within this endurance limit.
See UG116, Xilinx Device Reliability Report, for device
quality, reliability, and process node information.
Table 2: Platform Flash PROM Capacity
Platform
Flash PROM
Configuration
Bits
Platform
Flash PROM
Configuration
Bits
XCF01S
1,048,576
XCF08P
8,388,608
XCF02S
2,097,152
XCF16P
16,777,216
XCF04S
4,194,304
XCF32P
33,554,432
X-Ref Target - Figure 3
Figure 3: JTAG In-System Programming Operation
(a)SolderDevicetoPCB
(b) Program Using Download Cable
DS123_33_031908
GND
V CC
(a)
(b)
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