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參數(shù)資料
型號(hào)： XR16L651IM-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 22/56頁(yè)
文件大?。?/td> 0K
描述： IC UART FIFO 32B 48TQFP
標(biāo)準(zhǔn)包裝： 250
特點(diǎn)： *
通道數(shù)： 1，UART
FIFO's： 32 字節(jié)
規(guī)程： 打印機(jī)，RS232，RS422，RS485
電源電壓： 2.25 V ~ 5.5 V
帶并行端口： 是
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤(pán)
á
XR16L651
REV. 1.3.0
2.25V TO 5.5V UART WITH 32-BYTE FIFO
29
FCR[2]: TX FIFO Reset
This bit is only active when FCR bit-0 is a ‘1’.
Logic 0 = No transmit FIFO reset (default).
Logic 1 = Reset the transmit FIFO pointers and FIFO level counter logic (the transmit shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
FCR[3]: DMA Mode Select
Controls the behavior of the TXRDY# and RXRDY# pins. See “DMA Mode” on page 11.
Logic 0 = DMA Mode disabled (default).
Logic 1 = DMA Mode enabled.
FCR[5:4]: Transmit FIFO Trigger Select
(logic 0 = default, TX trigger level = one)
These 2 bits set the trigger level for the transmit FIFO interrupt. The UART will issue a transmit interrupt when
the number of characters in the FIFO falls below the selected trigger level, or when it gets empty in case that
the FIFO did not get filled over the trigger level on last re-load. Table 10 below shows the selections. EFR bit-4
must be set to ‘1’ before these bits can be accessed.
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1).
These 2 bits are used to set the trigger level for the receiver FIFO interrupt. Table 10 shows the complete
selections..
4.6
Line Control Register (LCR) - Read/Write
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
TABLE 10: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION WITH AUTO RTS HYSTERESIS
FCR
BIT-7
FCR
BIT-6
FCR
BIT-5
FCR
BIT
-4
TRANSMIT INT
TRIGGER LEVEL
RECEIVE INT
TRIGGER LEVEL
AUTO RTS
DE-ASSERT
AUTO RTS
RE-ASSERT
0
1
0
1
0
1
0
1
0
1
0
1
16
8
24
30
8
16
24
28
16
24
28
0
8
16
24
BIT-1
BIT-0
WORD LENGTH
0
5 (default)
01
6
10
7
11
8
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XR16L651IMTR-F 制造商:Exar Corporation 功能描述:UART 1-CH 32Byte FIFO 2.5V/3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16L651IMTR-F
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