參數(shù)資料
型號(hào): XR16L651IM-F
廠商: Exar Corporation
文件頁數(shù): 31/56頁
文件大小: 0K
描述: IC UART FIFO 32B 48TQFP
標(biāo)準(zhǔn)包裝: 250
特點(diǎn): *
通道數(shù): 1,UART
FIFO's: 32 字節(jié)
規(guī)程: 打印機(jī),RS232,RS422,RS485
電源電壓: 2.25 V ~ 5.5 V
帶并行端口:
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
á
XR16L651
REV. 1.3.0
2.25V TO 5.5V UART WITH 32-BYTE FIFO
37
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated (if IER bit-6 = 1) when the receive FIFO is filled to the programmed
trigger level and RTS de-asserts to a logic 1 at the next upper trigger level. RTS# will return to a logic 0 when
FIFO data falls below the next lower trigger level. The RTS# output must be asserted (logic 0) before the auto
RTS can take effect. RTS# pin will function as a general purpose output when hardware flow control is
disabled.
Logic 0 = Automatic RTS flow control is disabled. (default)
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled. (default)
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts to logic
1. Data transmission resumes when CTS# input returns to a logic 0.
4.17
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see Table 5.
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