參數(shù)資料
型號: XR16L784
廠商: Exar Corporation
英文描述: HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
中文描述: 高性能2.97V至5.5V UART的四
文件頁數(shù): 26/52頁
文件大?。?/td> 625K
代理商: XR16L784
XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
á
REV. 1.2.0
26
T
ABLE
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION.
S
HADED
BITS
ARE
ENABLED
BY
EFR B
IT
-4.
A
DDRESS
A3-A0
R
EG
N
AME
R
EAD
/
W
RITE
B
IT
-7
B
IT
-6
B
IT
-5
B
IT
-4
B
IT
-3
B
IT
-2
B
IT
-1
B
IT
-0
C
OMMENT
0 0 0 0
RHR
R
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=0
0 0 0 0
THR
W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=0
0 0 0 0
DLL
R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=1
0 0 0 1
DLM
R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=1
0 0 0 1
IER
R/W
0
0
0
0
Modem
Status
Int.
Enable
RX Line
Status
Int.
Enable
TX
Empty
Int.
Enable
RX Data
Int.
Enable
CTS/
DSR# Int.
Enable
RTS/
DTR# Int.
Enable
Xon/Xoff/
Sp. Char.
Int.
Enable
0 0 1 0
ISR
R
FIFOs
Enable
FIFOs
Enable
0
0
INT
Source
Bit-3
INT
Source
Bit-2
INT
Source
Bit-1
INT
Source
Bit-0
Delta-
Flow
Cntl
Xoff/spe-
cial char
0 0 1 0
FCR
W
RX FIFO
Trigger
RX FIFO
Trigger
TX FIFO
Trigger
TX FIFO
Trigger
DMA
Mode
TX FIFO
Reset
RX FIFO
Reset
FIFOs
Enable
0 0 1 1
LCR
R/W
Divisor
Enable
Set TX
Break
Set Par-
ity
Even
Parity
Parity
Enable
Stop Bits
Word
Length
Bit-1
Word
Length
Bit-0
0 1 0 0
MCR
R/W
0
0
0
Internal
Lopback
Enable
OP2
2
OP1
2
RTS#
Pin Con-
trol
DTR#
Pin Con-
trol
BRG
Pres-
caler
IR
Enable
XonAny
RTS/
DTR
Flow Sel
0 1 0 1
LSR
R/W
RX FIFO
E
RROR
TSR
Empty
THR
Empty
RX
Break
RX
Framing
Error
RX Par-
ity Error
RX
Overrun
RX Data
Ready
0 1 1 0
MSR
R
CD
RI
DSR
CTS
Delta
CD#
Delta
RI#
Delta
DSR#
Delta
CTS#
MSR
W
RS485
DLY-3
RS485
DLY-2
RS485
DLY-1
RS485
DLY-0
0
0
0
0
0 1 1 1
SPR
R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
User Data
1 0 0 0
FCTR
R/W
TRG
Table
Bit-1
TRG
Table
Bit-0
Auto
RS485
Enable
Invert IR
RX Input
RTS/
DTR
Hyst Bit-
3
RTS/
DTR
Hyst Bit-
2
RTS/
DTR
Hyst Bit-
1
RTS/
DTR
Hyst Bit-
0
1 0 0 1
EFR
R/W
Auto
CTS/
DSR
Enable
Auto
RTS/
DTR
Enable
Special
Char
Select
Enable
IER [7:4],
ISR [5:4],
FCR[5:4],
MCR[7:5]
MSR[7:4]
Soft-
ware
Flow
Cntl
Bit-3
Soft-
ware
Flow
Cntl
Bit-2
Soft-
ware
Flow
Cntl
Bit-1
Soft-
ware
Flow
Cntl
Bit-0
1 0 1 0
TXCNT
R
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1 0 1 0
TXTRG
W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
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