參數資料
型號: XR16L784
廠商: Exar Corporation
英文描述: HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
中文描述: 高性能2.97V至5.5V UART的四
文件頁數: 43/52頁
文件大?。?/td> 625K
代理商: XR16L784
á
REV. 1.2.0
XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
43
AC ELECTRICAL CHARACTERISTICS
TA=0
O
TO
70
O
C (-40
O
TO
+85
O
C
FOR
INDUSTRIAL
GRADE
PACKAGE
), V
CC
IS
2.97V
TO
5.5V 70
P
F L
OAD
WHERE
APPLICABLE
S
YMBOL
P
ARAMETER
3,3V
M
IN
3.3V
M
AX
5V
M
IN
5V
M
AX
U
NITS
T
C1,
T
C2
Clock Pulse Period
10
8
ns
T
OSC
Oscillator Frequency
16
24
MHz
T
ECK
External Clock Frequency
33
50
MHz
T
AS
Address Setup (16 Mode)
5
5
ns
T
AH
Address Hold (16 Mode)
10
10
ns
T
CS
Chip Select Width (16 Mode)
50
50
ns
T
DY
Delay between CS# Active Cycles (16 Mode)
50
50
ns
T
RD
Read Strobe Width (16 Mode)
50
50
ns
T
WR
Write Strobe Width (16 Mode)
40
30
ns
T
RDV
Read Data Valid (16 Mode)
35
25
ns
T
WDS
Write Data Setup (16 Mode)
15
10
ns
T
RDH
Read Data Hold (16 Mode)
15
10
ns
T
WDH
Write Data Hold (16 Mode)
15
10
ns
T
ADS
Address Setup (68 Mode)
10
5
ns
T
ADH
Address Hold (68 Mode)
10
10
ns
T
RWS
R/W# Setup to CS# (68 Mode)
10
10
ns
T
RDA
Read Data Access (68 mode)
35
25
ns
TRDH
Read Data Hold (68 mode)
15
10
ns
T
WDS
Write Data Setup (68 mode)
10
10
ns
T
WDH
Write Data Hold (68 Mode)
10
10
ns
T
RWH
CS# De-asserted to R/W# De-asserted (68 Mode)
10
10
ns
T
CSL
CS# Width (68 Mode)
50
40
ns
T
CSD
CS# Cycle Delay (68 Mode)
50
40
ns
T
WDO
Delay from IOW# to Modem Output
50
50
ns
T
MOD
Delay to set Interrupt from Modem Input
50
35
ns
T
RSI
Delay To Reset Interrupt From IOR#
50
35
ns
T
SSI
Delay From Stop To Set Interrupt
1
1
Bclk
T
RRI
Delay From IOR# To Reset Interrupt
45
40
ns
T
SI
Delay From Stop To Interrupt
45
40
ns
T
WRI
Delay From IOW# To Reset Interrupt
45
40
ns
T
RST
Reset Pulse
40
40
ns
Bclk
Baud Clock
16X or 8X of data rate
Hz
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