REV. 1.0.2 EFR[6]: Auto RTS Flow Control Enable RTS# output may be used for h" />
參數(shù)資料
型號(hào): XR16M2650IL32-F
廠商: Exar Corporation
文件頁數(shù): 28/47頁
文件大?。?/td> 0K
描述: IC UART FIFO 32B DUAL 32QFN
標(biāo)準(zhǔn)包裝: 490
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 32 字節(jié)
規(guī)程: RS232,RS422
電源電壓: 1.62 V ~ 3.63 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
XR16M2650
34
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 32-BYTE FIFO
REV. 1.0.2
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to HIGH. When Auto RTS is selected,
an interrupt will be generated when the receive FIFO is filled to the selected trigger level and RTS de-asserts
HIGH at the next upper trigger level. RTS# will return LOW when FIFO data falls below the next lower trigger
level. The RTS# output must be asserted (LOW) before the auto RTS can take effect. RTS# pin will function as
a general purpose output when hardware flow control is disabled.
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts HIGH.
Data transmission resumes when CTS# returns LOW.
4.14.1
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see Table 7.
相關(guān)PDF資料
PDF描述
1-1776244-9 TERM BLOCK RCPT 19POS VERT 5MM
1-1776244-8 TERM BLOCK RCPT 18POS VERT 5MM
1-1776244-7 TERM BLOCK RCPT 17POS VERT 5MM
1-1776244-6 TERM BLOCK RCPT 16POS VERT 5MM
1-1776244-5 TERM BLOCK RCPT 15POS VERT 5MM
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