參數(shù)資料
型號: XR17C158
廠商: Exar Corporation
英文描述: PCI Bus Octal UART(八通用異步接收器/發(fā)送器(滿足通訊系統(tǒng)中PCI總線和高帶寬要求))
中文描述: PCI總線八路的UART(八通用異步接收器/發(fā)送器(滿足通訊系統(tǒng)中的PCI總線和高帶寬要求))
文件頁數(shù): 10/51頁
文件大?。?/td> 685K
代理商: XR17C158
PCI BUS OCTAL UART
XR17C158
PRELIMINARY
REV. 1.0.0
10
N
OTE
:
RWR
1
=Read/Write from external EEPROM.
RWR=Read/Write from AD[31:0]. RO= Read Only.
RWC=Read/Write-Clear.
1.2
D
EVICE
C
ONFIGURATION
R
EGISTER
S
ET
The device configuration registers and a special way
to access each of the UART’s transmit and receive
data FIFOs are accessible directly from the PCI data
bus. This provides easy programming of general op-
erating parameters to the 158 UART and for monitor-
ing the status of various functions. The registers oc-
cupy 4K of PCI bus memory address space. These
addresses are offset onto the basic memory address,
a value loaded into the Memory Base Address Regis-
ter (BAR) in the PCI local bus configuration register
set. These registers control or report on all 8 channel
UARTs funtions that include interrupt control and sta-
tus, 16-bit general purpose timer control and status,
multipurpose inputs/outputs control and status, sleep
mode control, soft-reset control, and device indentifi-
cation and revision, and others.
The registers set is mapped into 8 address blocks
where each UART channel occupies 512 bytes mem-
ory space for its own 16550 compatible configuration
registers. The device configuration and control regis-
ters are embedded inside the UART channel zero’s
address space between 0x0080 to 0x0093. All these
registers can be accessed in 8, 16, 24 or 32 bit width
depending on the starting address given by the host
at beginning of the bus cycle. Transmit and receive
data may be loaded or unloaded in 8, 16, 24 or 32 bit
format to the register’s address. Every time a read or
write operation is made to the transmit or receive reg-
ister, its FIFO data pointer is automatically bumped to
the next sequential data location either in byte, word
or dword. One special case applies to the receive da-
ta unloading when reading the receive data together
with its LSR register content. The host must read
them in 16 or 32 bits format in order to maintain integ-
rity of the data byte with its associated error flags.
0x28
0x2C
31:0
31:16
RO
Reserved
Subsystem ID (write
from external EEPROM by customer)
0x00000000
0x0000
RWR
1
15:0
RWR
1
Subsystem Vendor ID (write
from external EEPROM by cus-
tomer)
Expansion ROM Base Address (Unimplemented)
Reserved (returns zeros)
Reserved (returns zeros)
Unimplemented MAXLAT
Unimplemented MINGNT
Interrupt Pin, use INTA#.
Interrupt Line.
0x0000
0x30
0x34
0x38
0x3C
31:0
31:0
31:0
31:24
23:16
15:8
7:0
RO
RO
RO
RO
RO
RO
RWR
0x00000000
0x00000000
0x00000000
0x00
0x00
0x01
0xXX
T
ABLE
1: PCI L
OCAL
B
US
C
ONFIGURATION
S
PACE
R
EGISTERS
A
DDRESS
B
ITS
T
YPE
D
ESCRIPTION
R
ESET
V
ALUE
(
HEX
)
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XR17C158CV-0A-EVB 功能描述:UART 接口集成電路 Supports C158 144 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR17C158CV-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR17C158CVTR-F 制造商:Exar Corporation 功能描述:UART 8-CH 64Byte FIFO 5V 144-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR17C158CVTR-F
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