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參數(shù)資料
| 型號(hào)： | XR17V252IM-F |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 23/69頁(yè) |
| 文件大小： | 0K |
| 描述： | IC UART PCI BUS DUAL 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 3.3V，5V |
| 帶自動(dòng)流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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XR17V252
3
REV. 1.0.2
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
PIN DESCRIPTIONS
NAME
PIN #
TYPE
DESCRIPTION
PCI LOCAL BUS INTERFACE
RST#
86
I
PCI Bus reset input (active low). It resets the PCI local bus configuration
space registers, device configuration registers and UART channel registers
to the default condition, see
CLK
87
I
PCI Bus clock input of up to 66.67MHz.
AD31-AD24,
AD23-AD16,
AD15-AD8,
AD7-AD0
90-97,
2-9,
24-31,
35-42
I/O
Address data lines [31:0] (bidirectional).
FRAME#
13
I
Bus transaction cycle frame (active low). It indicates the beginning and dura-
tion of an access.
C/BE3#-
C/BE0#
98, 12,
21, 34
I
Bus Command/Byte Enable [3:0] (active low). This line is multiplexed for bus
Command during the address phase and Byte Enables during the data
phase.
IRDY#
14
I
Initiator Ready (active low). During a write, it indicates that valid data is
present on data bus. During a read, it indicates the master is ready to accept
data.
TRDY#
15
O
Target Ready (active low).
STOP#
17
O
Target request to stop current transaction (active low).
IDSEL
99
I
Initialization device select (active high).
DEVSEL#
16
O
Device select to the XR17V252 (active low).
INTA#
85
OD
Device interrupt from XR17V252 (open drain, active low).
PAR
20
I/O
Parity is even across AD[31:0] and C/BE[3:0]#. (bidirectional, active high).
PERR#
18
O
Data Parity error indicator, except for Special Cycle transactions (active low).
Optional in bus target application.
SERR#
19
OD
System error indicator, Address parity or Data parity during Special Cycle
transactions (open drain, active low). Optional in bus target application.
MODEM OR SERIAL I/O INTERFACE
TX0
73
O
UART channel 0 Transmit Data or infrared transmit data. Normal TXD output
idles HIGH while infrared TXD output idles LOW.
RX0
66
I
UART channel 0 Receive Data or infrared receive data. Normal RXD input
idles HIGH while infrared RXD input idles LOW. In the infrared mode, the
polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit
is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a
logic 1, a HIGH on the RXD input is considered a space.
RTS0#
71
O
UART channel 0 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
CTS0#
67
I
UART channel 0 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
DTR0#
72
O
UART channel 0 Data Terminal Ready or general purpose output (active
low). If this output is not used, leave it unconnected.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR17V252IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 3.3V 100-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR17V252IMTR-F |
| XR17V254 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV-0A-EVB | 功能描述:UART 接口集成電路 Supports V254 144 ld LQFP,PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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