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參數(shù)資料
| 型號(hào)： | XR17V252IM-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 56/69頁 |
| 文件大小： | 0K |
| 描述： | IC UART PCI BUS DUAL 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 3.3V，5V |
| 帶自動(dòng)流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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XR17V252
6
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
FUNCTIONAL DESCRIPTION
The XR17V252 (V252) consists of two enhanced 16550 UARTs with a conventional PCI interface and a non-
volatile memory interface for PCI plug-and-play auto-configuration. The PCI local bus is a synchronous timing
bus where all bus transactions are associated with the bus clock. The V252 supports 66MHz clock and 32-bit
wide read and write data transfer operations including data burst mode through the PCI interface. Read and
write data operations may be in byte, word or double-word (DWORD) format. The device consists of three sets
of registers:
PCI local bus configuration registers for PCI auto configuration
32-bit global device configuration registers for overall control and monitoring of the 2 UART channels.
A combination set of the 16C550 compatible registers and enhanced registers in each of the individual UART
channel, for control, status, and byte wide data transfer
Each UART channel has 64-byte FIFOs, automatic RTS/CTS or DTR/DSR hardware flow control with
hysteresis control, automatic Xon/Xoff software flow control, programmable transmit and receive FIFO trigger
level, FIFO level counters, infrared encoder and decoder (IrDA ver. 1.0), and a programmable fractional baud
rate generator with a prescaler of 1X or 4X, and data rate up to 6.25 Mbps at 8X sampling clock.The
XR17V252 is available in a 100-pin TQFP (14x14x1.0mm) industrial grade package.
PCI LOCAL BUS INTERFACE
This is the host interface and it meets the PCI local bus specification revision 3.0. The PCI local bus operations
are synchronous, where each transaction is associated to the bus clock. The V252 can operate with the bus
clock of up to a 66.67MHz. Data transfers operation can be formatted in 8-bit, 16-bit, 24-bit or 32-bit wide. With
32-bit data operations, it pushes the data transfer rate on the bus up to 264 MByte/sec. This increases the
overall system’s communication performance up to 32 times better than the 8-bit ISA bus. See PCI local bus
specification revision 3.0 for bus operation details.
PCI LOCAL BUS CONFIGURATION SPACE REGISTERS
A set of PCI local bus configuration space register is provided. These registers provide the PCI local bus
operating system with the card’s vendor ID, device ID, sub-vendor ID, product model number, and resources
and capabilities. The PCI local bus operating system collects this data from all the cards on the bus during the
auto configuration phase that follows immediately after a power up or system reset/reboot. After it has sorted
out all devices on the bus, it defines and download the operating conditions to the cards. One of the definitions
is the base address loaded into the Base Address Register (BAR) where the card will be operating in the PCI
local bus memory space. All this is described in more detail in “Section 1.1, PCI LOCAL BUS
POWER MANAGEMENT REGISTERS
This set of registers is a continuation of the Configuration Space and provides status and control of Power
Management functions of the V252. The Power Management Capabilities (PMC) register and the Power
Management Control/Status Register (PMCSR) are implemented. “Section 1.2, Power Management
Registers” on page 9 describes these registers and details how Power Management is implemented in the
device.
EEPROM INTERFACE
An external 93C46 EEPROM is used to store 8 words of information. Details of this information can be found in
“Section 1.4, EEPROM Interface” on page 12. This information is only used with the plug-and-play auto
configuration of the PCI local bus. These data provide automatic hardware installation onto the PCI bus. The
EEPROM interface consists of 4 signals, EEDI, EEDO, EECS, and EECK. The EEPROM is not needed when
auto configuration is not required in the application. However, if your design requires non-volatile memory for
other purpose, it is possible to store and retrieve data on the EEPROM through a special PCI device
configuration register. See application note DAN112 for its programming details.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR17V252IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 3.3V 100-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR17V252IMTR-F |
| XR17V254 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV-0A-EVB | 功能描述:UART 接口集成電路 Supports V254 144 ld LQFP,PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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