REV. 1.1.1 PIN DESCRIPTIONS Pin Description N
參數(shù)資料
型號(hào)： XR68M752IM48-F
廠商： Exar Corporation
文件頁數(shù)： 34/54頁
文件大?。?/td> 0K
描述： IC UART FIFO 64B DUAL 48TQFP
標(biāo)準(zhǔn)包裝： 250
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
規(guī)程： RS232，RS422，RS485
電源電壓： 1.62 V ~ 3.63 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤
其它名稱： 1016-1479
1016-1479-ND
1016-1642
XR68M752IM48-F-ND
XR16M752/XR68M752
4
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.1.1
PIN DESCRIPTIONS
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
49-STBGA
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
18
19
20
26
27
28
G7
E7
E6
I
Address data lines [2:0]. These 3 address lines select
one of the internal registers in UART channel A/B during
a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
2
1
32
31
30
29
28
27
3
2
1
48
47
46
45
44
C2
C1
B1
B2
A2
B4
B3
A3
I/O
Data bus lines [7:0] (bidirectional).
IOR#
(NC)
14
19
G4
I
When 16/68# pin is HIGH, the Intel bus interface is
selected and this input becomes read strobe (active low).
The falling edge instigates an internal read cycle and
retrieves the data byte from an internal register pointed
by the address lines [A2:A0], puts the data byte on the
data bus to allow the host processor to read it on the ris-
ing edge.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input is not used.
IOW#
(R/W#)
12
15
F2
I
When 16/68# pin is HIGH, it selects Intel bus interface
and this input becomes write strobe (active low). The fall-
ing edge instigates the internal write cycle and the rising
edge transfers the data byte on the data bus to an inter-
nal register pointed by the address lines.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input becomes read (HIGH) and write
(LOW) signal.
CSA#
(CS#)
7
10
E2
I
When 16/68# pin is HIGH, this input is chip select A
(active low) to enable channel A in the device.
When 16/68# pin is LOW, this input becomes the chip
select (active low) for the Motorola bus interface.
CSB#
(A3)
8
11
E1
I
When 16/68# pin is HIGH, this input is chip select B
(active low) to enable channel B in the device.
When 16/68# pin is LOW, this input becomes address
line A3 which is used for channel selection in the Motor-
ola bus interface. Input logic 0 selects channel A and
logic 1 selects channel B.
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