參數(shù)資料
型號： XRT16C854
廠商： Exar Corporation
英文描述： 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
中文描述： 2.97V至5.5V四路UART的128字節(jié)FIFO
文件頁數(shù)： 10/54頁
文件大?。?/td> 485K
代理商： XRT16C854
XR16C854/854D
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
xr
REV. 3.0.1
10
2.0
FUNCTIONAL DESCRIPTIONS
2.1
The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and
write transactions. The 854 data interface supports the Intel compatible types of CPUs and it is compatible to
the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data bus
transaction. Each bus cycle is asynchronous using CS# A-D, IOR# and IOW# or CS#, R/W#, A4 and A3 inputs.
All four UART channels share the same data bus for host operations. A typical data bus interconnection for
Intel and Motorola mode is shown in
Figure 4
.
CPU Interface
F
IGURE
4. XR16C854/854D T
YPICAL
I
NTEL
/M
OTOROLA
D
ATA
B
US
I
NTERCONNECTIONS
VCC
VCC
DSRA#
CDA#
CTSA#
RTSA#
DTRA#
RXA
TXA
RIA#
GND
A0
A1
A2
UART_CSA#
UART_CSB#
UART_CSC#
UART_CSD#
IOR#
IOW#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
CSA#
CSB#
CSC#
CSD#
D0
D1
D2
D3
D4
D5
D6
D7
IOR#
IOW#
UART
Channel A
UART
Channel B
UART_INTB
UART_INTC
UART_INTA
INTB
INTC
INTA
UART_RESET
RESET
Serial Interface of
RS-232
Serial Interface of
RS-232
Intel Data Bus (16 Mode) Interconnections
UART
Channel C
UART
Channel D
Similar
to Ch A
Similar
to Ch A
Similar
to Ch A
UART_INTD
INTD
VCC
16/68#
VCC
VCC
GND
A0
A1
A2
A3
A4
UART_CS#
R/W#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
CSB#
CSC#
CSD#
CSA#
D0
D1
D2
D3
D4
D5
D6
D7
IOR#
IOW#
UART_IRQ#
INTB
INTC
INTD
INTA
RESET#
Serial Interface of
RS-232
Serial Interface of
RS-232
Motorola Data Bus (68 Mode) Interconnections
VCC
UART_RESET#
(no connect)
(no connect)
(no connect)
DSRA#
CDA#
CTSA#
RTSA#
DTRA#
RXA
TXA
RIA#
UART
Channel A
UART
Channel B
UART
Channel C
Similar
to Ch A
Similar
to Ch A
Similar
to Ch A
VCC
16/68#
UART
Channel D
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