
XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
á
PRELIMINARY
REV. P1.1.3
187
The XRT72L52 Framer IC is a digital device that
takes DS3 payload and overhead bit information from
some terminal equipment, processes this data and ul-
timately, multiplexes this information into a series of
outbound DS3 frames. However, for DS3 coaxial ca-
ble applications, the XRT72L52 Framer IC lacks the
current drive capability to be able to directly transmit
this DS3 data stream through some transformer-cou-
pled coax cable with enough signal strength for it to
comply with the Isolated Pulse Template require-
ments and be received by the remote receiver.
Therefore, in order to get around this problem, the
Framer IC requires the use of an LIU (Line Interface
Unit) IC. An LIU is a device that has sufficient drive
capability, along with the necessary pulse-shaping
circuitry to be able to transmit a signal through the
transmission medium in a manner that it can (1) com-
ply with the DSX-3 Isolated Pulse Template require-
ments and (2) be reliably received by the Remote Ter-
minal Equipment. Figure 65 presents a circuit draw-
ing depicting the Framer IC interfacing to an LIU
(XRT7300 DS3/E3/STS-1 Transmit LIU).
The Transmit Section of the XRT72L52 contains a
block which is known as the Transmit DS3 LIU Inter-
face block. The purpose of the Transmit DS3 LIU In-
terface block is to take the outbound DS3 data
stream, from the Transmit DS3 Framer block, and to
do the following:
1.
Encode this data into one of the following line
codes
a.
Unipolar (e.g., Single-Rail)
b.
AMI (Alternate Mark Inversion)
c.
B3ZS (Bipolar 3 Zero Substitution)
2.
And to transmit this data to the LIU IC.
Figure 66 presents a simple illustration of the Trans-
mit DS3 LIU Interface block.
F
IGURE
65. A
PPROACH
TO
I
NTERFACING
THE
XRT72L52 F
RAMER
IC
TO
THE
XRT7302 DS3/E3/STS-1 T
RANSMIT
-
TER
LIU (
ONE
CHANNEL
SHOWN
)
R1
37.4
R3
31.6
ALE
RD*
WR*
44.736MHz
R2
37.4
T1
T3001
1
6
3
4
Rx_OOF_Ch_0
R6
270
A[9:0]
T2
T3001
1
6
3
4
0.01uF
0.01uF
RxAVDD_0
HW_RESET*
D[7:0]
0.01uF
U2
XRT73L02IV
3
5
73
72
28
27
76
75
11
10
9
78
77
79
16
26
7
29
12
13
15
80
23
8
74
71
17
18
19
20
42
TxAVDD0
TxAGND0
TTIP0
TRING0
RTIP0
RRING0
MTIP0
MRING0
RPOS0
RNEG0
RCLK0
TPDATA_0
TNDATA_0
TCLK_0
RxAVDD0
RxDVDD0
RxAGND0
RxDGND0
RLOS_0
TxOFF_0
LOSTHR_0
TxAVDD0
TxAGND0
CS
SDI
SDO
TxAVDD
J2
BNC
1
2
XRT72L52_INT*
RxDATA_IN_0
R5
270
TxFRAME_0
DVDD_0
R7
4.7k
R4
31.6
0.01uF
XRT71D00_CS* (Optional)
RxRED_ALARM_0
READY_OUT*
U1
XRT72L52_Ch_0
17
16
18
150
5
151
152
156
157
155
158
4
23
21
24
89
88
94
95
96
97
98
99
100
101
102
105
106
107
108
110
111
112
113
115
92
91
90
85
116
133
22
128
125
126
122
3
2
159
160
87
103
TxPOS_0
TxNEG_0
TxLineClk_0
TDMO_0
ERLOL_0
LREQB_0
RLOOP_0
TAOS_0
ENCODIS_0 (TxOFF_0)
RxPOS_0
RxNEG_0
RxLineClk_0
RESET
A0
A1
A2
A3
A4
A5
A6
A7
A8
D0
D1
D2
D3
D4
D5
D6
D7
CS
INT
WRB_RW
TxSer_0
MOTO
RxLOS_0
NIBBLEINTF
A9
J1
BNC
1
2
0.01uF