參數(shù)資料
型號: XRT7302
廠商: Exar Corporation
英文描述: 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
中文描述: 2頻道E3/DS3/STS-1線路接口單元(2通道E3/DS3/STS-1線接口單元)
文件頁數(shù): 40/62頁
文件大?。?/td> 715K
代理商: XRT7302
XRT7302
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
á
PRELIMINARY
REV. 1.1.6
36
checks for the occurrence of either a "00V" or a "B0V"
pattern. If the B3ZS Decoder detects this particular
pattern, it substitutes these bits with a "000" pattern.
N
OTE
:
If the B3ZS Decoder detects any bipolar violations
that is not in accordance with theB3ZS Line Code format or
if the B3ZS Decoder detects a string of 3 or more consecu-
tive "0’s" in the incoming line signal, the B3ZS Decoder
flags this event as a Line Code Violation by pulsing the LCV
output pin “High".
Figure 18 illustrates the B3ZS Decoder at work with
two separate Zero Suppression patterns in the in-
coming Dual-Rail Data Stream.
3.5.2
HDB3 Decoding E3 Applications
If the XRT7302 is configured to operate in the E3
Mode, then each of the HDB3/B3ZS Decoding Blocks
performs HDB3 Decoding. When the Decoders are
operating in this mode, they each parse through the
incoming Dual-Rail data and check for the occurrence
of either a "000V" or a "B00V" pattern. If the HDB3
Decoder detects this particular pattern, it substitutes
these bits with a "0000" pattern.
Figure 19 illustrates the HDB3 Decoder at work with
two separate Zero Suppression patterns in the in-
coming Dual-Rail Data Stream.
N
OTE
:
If the HDB3 Decoder detects any bipolar violation
(e.g., "V") pulses that is not in accordance with the HDB3
Line Code format, or if the HDB3 Decoder detects a string
of 4 or more "0's" in the incoming line signal, the HDB3
Decoder flags this event as a Line Code Violation by puls-
ing the LCV output pin “High".
3.5.3
Configuring the HDB3/B3ZS Decoder
The XRT7302 can enable or disable the HDB3/B3ZS
Decoder blocks of each Channel by either of the fol-
lowing means.
a. Operating in the HOST Mode
Enable the HDB3/B3ZS Decoder block of Channel(n)
by writing a "0" into the ENDECDIS(n) bit-field in
Command Register CR2-(n).
F
IGURE
18. A
N
E
XAMPLE
OF
B3ZS D
ECODING
Line Signal
RxClk
Data
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
RPOS
RNEG
B
0
V
0
V
0
F
IGURE
19. A
N
E
XAMPLE
OF
HDB3 D
ECODING
B
0
V
0
0
V
Line Signal
0
0
RxClk
Data
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
RPOS
RNEG
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