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PRELIMINARY
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302
REV. 1.1.6
37
b. Operating in the Hardware Mode
To globally enable all HDB3/B3ZS Decoder blocks in
the XRT7302, pull the ENDEC_DIS input pin “Low".
To globally disable all HDB3/B3ZS Decoder blocks in
the XRT7302 and configure the XRT7302 to transmit
and receive in an AMI format, pull the ENDEC_DIS
input pin "High".
3.6
LOS D
ECLARATION
/C
LEARANCE
Each channel of the XRT7302 contains circuitry that
monitors the following two parameters associated
with the incoming line signals.
1.
The amplitude of the incoming line signal via the
RTIP and RRing inputs.
2.
The number of pulses detected in the incoming
line signal within a certain amount of time.
If a given channel of the XRT7302 determines that
the incoming line signal is missing due to either insuf-
ficient amplitude or a lack of pulses in the incoming
line signal, it declares a Loss of Signal (LOS) condi-
tion. The channel declares the LOS condition by tog-
gling its respective RLOS(n) output pin “High” and by
setting its corresponding RLOS(n) bit field in Com-
mand Register 0 or Command Register 8 to "1".
Conversely, if the channel determines that the incom-
ing line signal has been restored (e.g., there is suffi-
cient amplitude and pulses in the incoming line sig-
nal), it clears the LOS condition by toggling its re-
spective RLOS(n) output pin "Low" and setting its cor-
responding RLOS(n) bit-field to "0".
In general, the LOS Declaration/Clearance scheme
that is employed in the XRT7302 is based upon ITU-T
Recommendation G.775 for both E3 and DS3 appli-
cations.
3.6.1
The LOS Declaration/Clearance Criteria
for E3 Applications
When the XRT7302 is operating in the E3 Mode, a
given channel declares an LOS Condition if its re-
ceive line signal amplitude drops to -35dB or below.
Further, the channel clears the LOS Condition if its
receive line signal amplitude rises back to -15dB or
above. Figure 20 illustrates the signal levels at which
each channel of the XRT7302 declares and clears
LOS.
COMMAND REGISTER CR2-(N)
D4
D3
D2
D1
D0
Reserved
ENDEC_DIS
ALOSDIS(n)
DLOSDIS(n)
REQEN(n)
X
0
X
X
1