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參數資料
| 型號： | XRT75L04DIV |
| 廠商： | EXAR CORP |
| 元件分類： | 數字傳輸電路 |
| 英文描述： | FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP176 |
| 封裝： | 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176 |
| 文件頁數： | 72/98頁 |
| 文件大?。?/td> | 536K |
| 代理商： | XRT75L04DIV |
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XRT75L04D
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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REV. 1.0.1
68
span thousands of miles, traverse many different pieces of equipments, and even cross International
boundaries; in practice, the SONET/SDH network is NOT synchronized to a single clock source.
In practice, the SONET/SDH network can be thought of as being divided into numerous "Synchronization
Islands". Each of these "Synchronization Islands" will consist of numerous pieces of SONET Terminal
Equipment. Each of these pieces of SONET Terminal Equipment will all be synchronized to a single Stratum-1
clock source which is the most accurate clock source within the Synchronization Island. Typically a
"Synchronization Island" will consist of a single "Timing Master" equipment along with multiple "Timing Slave"
pieces of equipment. This "Timing Master" equipment will be directly connected to the Stratum-1 clock source
and will have the responsibility of distributing a very accurate clock signal (that has been derived from the
Stratum 1 clock source) to each of the "Timing Slave" pieces of equipment within the "Synchronization Island".
The purpose of this is to permit each of the "Timing Slave" pieces of equipment to be "synchronized" with the
"Timing Master" equipment, as well as the Stratum 1 Clock source. Typically this "clock distribution" is
performed in the form of a BITS (Building Integrated Timing Supply) clock, in which a very precise clock signal
is provided to the other pieces of equipment via a T1 or E1 line signal.
Many of these "Synchronization Islands" will use a Stratum-1" clock source that is derived from GPS pulses
that are received from Satellites that operate at Geo-synchronous orbit. Other "Synchronization Islands" will
use a Stratum-1" clock source that is derived from a very precise local atomic clock. As a consequence,
different "Synchronization Islands" will use different Stratum 1 clock sources. The up-shot of having these
"Synchronization Islands" that use different "Stratum-1 clock" sources, is that the Stratum 1 Clock frequencies,
between these "Synchronization Islands" are likely to be slightly different from each other. These "frequency-
differences" within Stratum 1 clock sources will result in "clock-domain changes" as a SONET signal (that is
traversing the SONET network) passes from one "Synchronization Island" to another.
The following section will describe how these "frequency differences" will cause a phenomenon called "pointer
adjustments" to occur in the SONET Network.
9.3.3
Causes of Pointer Adjustments
The best way to discuss how pointer adjustment events occur is to consider an STS-1 signal, which is driven by
a timing reference of frequency f1; and that this STS-1 signal is being routed to a network equipment (that
resides within a different "Synchronization Island") and processes STS-1 data at a frequency of f2.
N
OTE
:
Clearly both frequencies f1 and f2 are at the STS-1 rate (e.g., 51.84MHz). However, these two frequencies are
likely to be slightly different from each other.
Now, since the STS-1 signal (which is of frequency f1) is being routed to the network element (which is
operating at frequency f2), the typical design approach for handling "clock-domain" differences is to route this
STS-1 signal through a "Slip Buffer" as illustrated below.
相關PDF資料 |
PDF描述 |
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| XRT75L04 | FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75L04IV | FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75L06D | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75L06DIB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75L06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
相關代理商/技術參數 |
參數描述 |
|---|---|
| XRT75L04DIV-F | 功能描述:外圍驅動器與原件 - PCI 4-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75L04DIVTR | 功能描述:時鐘合成器/抖動清除器 4 CHNL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L04DIVTR-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L04ES | 功能描述:時鐘合成器/抖動清除器 4CH T3/E3/STS1 LIU+JA 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L04IV | 功能描述:外圍驅動器與原件 - PCI 4CH E3/DS3/STS1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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