參數(shù)資料
型號(hào): XRT75R03IV
廠商: EXAR CORP
元件分類(lèi): 數(shù)字傳輸電路
英文描述: THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: 14 X 20 MM, LQFP-128
文件頁(yè)數(shù): 48/92頁(yè)
文件大小: 492K
代理商: XRT75R03IV
XRT75R03
REV. 1.0.7
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
45
6.2
The Clock and Data Recovery Circuit extracts the embedded clock, RxClk_n from the sliced digital data stream
and provides the retimed data to the B3ZS (HDB3) decoder.
The Clock Recovery PLL can be in one of the following two modes:
Training Mode:
In the absence of input signals at RTIP_n and RRing_n pins, or when the frequency difference between the
recovered line clock signal and the reference clock applied on the ExClk_n input pins exceed 0.5%, a Loss of
Lock condition is declared by toggling RLOL_n output pin “High” (in Hardware Mode) or setting the RLOL_n bit
to “1” in the control registers (in Host Mode). Also, the clock output on the RxClk_n pins are the same as the
reference clock channel.
Clock and Data Recovery:
F
IGURE
19. I
NTERFERENCE
M
ARGIN
T
EST
S
ET
UP
FOR
E3.
T
ABLE
9: I
NTERFERENCE
M
ARGIN
T
EST
R
ESULTS
M
ODE
C
ABLE
L
ENGTH
(A
TTENUATION
)
I
NTERFERENCE
T
OLERANCE
E3
0 dB
Equalizer “IN”
-14 dB
12 dB
-19 gB
DS3
0 feet
-18.5 dB
225 feet
-17.5 dB
450 feet
-17 dB
STS-1
0 feet
-15 dB
225 feet
-14 dB
450 feet
-14 dB
Attenuator 1
N
S
Sine Wave
Generator
17.184mHz
Signal Source
2
23
-1 PRBS
Attenuator 2
Test
Equipment
DUT
(XRT75R03)
Cable Simulator
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