參數(shù)資料
型號(hào): XRT75R03IV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: 14 X 20 MM, LQFP-128
文件頁數(shù): 86/92頁
文件大?。?/td> 492K
代理商: XRT75R03IV
XRT75R03
REV. 1.0.7
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
83
T
ABLE
30: J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTER
- C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
07
Channel 1 Address Location = 0x0F
Channel 2 Address Location = 0x17
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Unused
JA RESET
Ch_n
JA1 Ch_n
JA in Tx Path
Ch_n
JA0 Ch_n
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
B
IT
N
UMBER
N
AME
T
YPE
D
EFAULT
V
ALUE
D
ESCRIPTION
7 - 4
Unused
R/O
0
3
JA RESET Ch_n
R/W
0
Jitter Attenuator RESET - Channel_n:
Writing a "0 to 1" transition within this bit-field will configure
the Jitter Attenuator (within Channel_n) to execute a
RESET operation.
Whenever the user executes a RESET operation, then all
of the following will occur.
The READ and WRITE pointers (within the Jitter
Attenuator FIFO) will be reset to their default values.
The contents of the Jitter Attenuator FIFO will be
flushed.
N
OTE
:
The user must follow up any "0 to 1" transition with
the appropriate write operate to set this bit-field
back to "0", in order to resume normal operation
with the Jitter Attenuator.
2
JA1 Ch_n
R/W
0
Jitter Attenuator Configuration Select Input - Bit 1:
This READ/WRITE bit-field, along with Bit 0 (JA0 Ch_n) is
used to do any of the following.
To enable or disable the Jitter Attenuator corresponding
to Channel_n.
To select the FIFO Depth for the Jitter Attenuator within
Channel_n.
The relationship between the settings of these two bit-
fields and the Enable/Disable States, and FIFO Depths is
presented below.
JA0
JA1
Jitter Attenuator Mode
1
1
Disabled
1
0
Disabled
0
1
FIFO Depth = 32 bits
0
0
FIFO Depth = 16 bits
相關(guān)PDF資料
PDF描述
XRT75R06D SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06DIB SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R06IB SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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