參數(shù)資料
型號(hào)： XRT75R12IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述： DATACOM, PCM TRANSCEIVER, PBGA420
封裝： 35 X 35 MM, TBGA-420
文件頁(yè)數(shù)： 12/89頁(yè)
文件大?。?/td> 457K
代理商： XRT75R12IB
XRT75R12
REV. P1.0.2
PRELIMINARY
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
9
CLOCK INTERFACE
P
IN
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
R5
SFM_EN
I
Single Frequency Mode Enable
This input pin is used to configure the XRT75R12 to operate in the SFM (Single
Frequency Mode).
When this feature is invoked, the SFM Synthesizer will become active. By
applying a 12.288MHz clock signal to the STS-1Clk/12M pin, the XRT75R12 will
generate all of the appropriate clock signals (e.g., 34.368MHz, 44.736MHz or
51.84). The XRT75R12 internal circuitry will route each of these synthesized
clock signals to the appropriate nodes of the corresponding channels in the
XRT75R12.
"Low" - Disables the Single Frequency Mode. In this setting, the user is
required to supply to the E3CLK, DS3CLK or STS-1CLK input pins all of the rel-
evant clock signals that are to be used within the chip.
"High" - Enables the Single-Frequency Mode.
N
OTE
:
This input pin is internally pulled low.
R1
E3Clk
I
E3 Clock Input (34.368 MHz ± 20 ppm)
If any one of the channels is configured in E3 mode, a reference clock of 34.368
MHz ± 20 ppm is applied to this input pin. If the LIU is used in E3 mode only,
this pin must be connected to the DS3Clk input pin to have access to the inter-
nal microprocessor.
N
OTE
:
SFM mode negates the need for this clock
T1
DS3Clk
I
DS3 Clock Input (44.736 MHz ± 20 ppm)
If any one of the channels is configured in DS3 mode, a reference clock of
44.736 MHz ± 20 ppm is applied to this input pin.
N
OTE
:
SFM mode negates the need for this clock
U1
STS-1Clk/12M
I
STS-1 Clock Input (51.84 MHz ± 20 ppm)
If any one of the channels is configured in STS-1 mode, a reference clock of
51.84MHz ± 20 ppm is applied to this input pin. If the LIU is used in STS-1
mode only, this pin must be connected to the DS3Clk input pin to have access
to the internal microprocessor.
Single Frequency Mode Clock (12.288MHz) Input
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the rates (E3, DS3 or STS-1).
C26
W22
K23
W24
J25
V25
J2
V2
K4
W3
C1
W5
CLKOUT0
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
CLKOUT7
CLKOUT8
CLKOUT9
CLKOUT10
CLKOUT11
O
Reference clock out
A reference clock pin is provided for each channel that will supply a precise data
rate frequency derived from either the Clock input pin (E3Clk, DS3Clk, or STS-
1Clk) or the 12.288MHz input in SFM mode. This frequency will be as stable as
the original source. It is designed to provide the attached framer with its appro-
priate reference clock.
相關(guān)PDF資料
PDF描述
XRT75VL00 E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75VL00IV E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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XRT79L71IB 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
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XRT75VL00 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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