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參數(shù)資料
| 型號(hào)： | XRT75VL00 |
| 廠商： | Exar Corporation |
| 英文描述： | E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| 中文描述： | E3/DS3/STS-1線路接口單元與抖動(dòng)衰減器 |
| 文件頁數(shù)： | 12/50頁 |
| 文件大?。?/td> | 268K |
| 代理商： | XRT75VL00 |
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XRT75VL00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.3
10
30
RLOS
O
Receive Loss of Signal Output Indicator
This output pin toggles "High" if Receiver has detected a Loss of Signal Condi-
tion in the incoming line signal.
The criteria for declaring/clearing an LOS Condition depends upon whether it is
operating in the E3 or STS-1/DS3 Mode and is described in Section 2.04.
29
RLOL
O
Receive Loss of Lock Output Indicator:
This output pin toggles "High" if the XRT75VL00 has detected a Loss of Lock
Condition. LOL (Loss of Lock) condition is declared if the recovered clock fre-
quency deviates from the Reference Clock frequency (available at ExClk input
pin) by more than 0.5%.
33
Rext
****
External Bias control Resistor of 3.3 K
±1%.
Should be connected to RefAGND via 3.3 K
resistor.
15
TEST
I
Test Mode:
Connect this pin “High” to configure the XRT75VL00 in test mode.
N
OTE
:
This pin is internally pulled Down.
16
ICT
I
In-Circuit Test Input
:
Setting this pin "Low" causes all digital and analog outputs to go into a high-
impedance state to allow for in-circuit testing. For normal operation, set this pin
"High".
N
OTE
:
This pin is internally pulled “High".
2
TAOS
I
Transmit All Ones Select
A “High" on this pin causes the Transmitter Section to generate and transmit a
continuous AMI all “1’s” pattern onto the line. The frequency of this “1’s” pattern
is determined by TxClk.
N
OTES
:
1.
This input pin is ignored if the XRT75VL00 is operating in the HOST
Mode and should be tied to GND.
2.
Analog Loopback and Remote Loopback have priority over request.
3.
This pin is internally pulled down.
28
LOSMUT/
INT
I/O
MUTE-upon-LOS Enable Input or Interrupt Ouput:
In Hardware Mode, setting this pin “High” configures the XRT75VL00 to Mute
the recovered data on the RPOS and RNEG whenever an LOS condition is
declared. RPOS and RNEG outputs are pulled “Low”.
N
OTE
:
If the XRT75VL00 is configured in HOST mode, this pin functions as
INT pin (please refer to the pin description for the Microprocessor
Interface).
CONTROL AND ALARM INTERFACE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75VL00_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00D | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75VL00D_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
| XRT75VL00D1V-F | 制造商:Exar Corporation 功能描述: |
| XRT75VL00DES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 1CHT3/E3/STS1LIU+ DESYNC 3.3V DRV VER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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