參數(shù)資料
型號(hào): XRT75VL00
廠商: Exar Corporation
英文描述: E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: E3/DS3/STS-1線路接口單元與抖動(dòng)衰減器
文件頁(yè)數(shù): 2/50頁(yè)
文件大?。?/td> 268K
代理商: XRT75VL00
XRT75VL00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.3
2
TRANSMIT INTERFACE CHARACTERISTICS
Accepts either Single-Rail or Dual-Rail data from Terminal Equipment and generates a bipolar signal to the
line
Integrated Pulse Shaping Circuit.
Built-in B3ZS/HDB3 Encoder (which can be disabled).
Accepts Transmit Clock with duty cycle of 30%-70%.
Generates pulses that comply with the ITU-T G.703 pulse template for E3 applications.
Generates pulses that comply with the DSX-3 pulse template, as specified in Bellcore GR-499
-CORE
and
ANSI T1.102_1993.
Generates pulses that comply with the STSX-1 pulse template, as specified in Bellcore GR-253-CORE.
Transmitter can be turned off in order to support redundancy designs.
RECEIVE INTERFACE CHARACTERISTICS
Integrated Adaptive Receive Equalization for optimal Clock and Data Recovery.
Declares and Clears the LOS defect per ITU-T G.775 requirements for E3 and DS3 applications.
Meets Jitter Tolerance Requirements, as specified in ITU-T G.823_1993 for E3 Applications.
Meets Jitter Tolerance Requirements, as specified in Bellcore GR-499-CORE for DS3 Applications.
Declares Loss of Signal (LOS) and Loss of Lock (LOL) Alarms.
Built-in B3ZS/HDB3 Decoder (which can be disabled).
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRT 75VL00
HOST/HW
STS-1/DS3
E3
REQEN
RTIP
RRING
SR/DR
LLB
XRT75L03
RLB
RLOS
JATx/Rx
TPData
TNData
TxClk
TAOS
TxLEV
TxON
Note: Serial Processor Interface input pins are shared by in "Host" Mode and redefined in the "Hardware" Mode.
Device
Monitor
MTIP
MRING
DMO
Timing
Control
TTIP
TRING
Tx
Pulse
Shaping
HDB3/
B3ZS
Encoder
RLOL
RxON
RxClkINV
RxClk
RPOS
RNEG/
LCV
Tx
Control
Jitter
Attenuator
MUX
Line
Driver
Invert
Remote
LoopBack
HDB3/
B3ZS
Decoder
MUX
AGC/
Equalizer
Peak Detector
LOS
Detector
Slicer
Jitter
Attenuator
Serial
Processor
Interface
Local
LoopBack
Clock & Data
Recovery
Clock
Synthesizer
ExClk/12M
RESET
CS
SClk
INT
SDO
SDI
CLK_OUT
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參數(shù)描述
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XRT75VL00DES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 1CHT3/E3/STS1LIU+ DESYNC 3.3V DRV VER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel