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參數(shù)資料
| 型號(hào)： | XRT79L72 |
| 廠商： | Exar Corporation |
| 英文描述： | 2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| 中文描述： | 2 -通道DS3/E3自動(dòng)柜員機(jī)用戶(hù)到網(wǎng)絡(luò)接口/ Combo IC對(duì)購(gòu)買(mǎi)力平價(jià) |
| 文件頁(yè)數(shù)： | 17/72頁(yè) |
| 文件大?。?/td> | 441K |
| 代理商： | XRT79L72 |
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xr
2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
PRELIMINARY
XRT79L72
REV. P1.0.2
14
E5
C21
TxGFCClk
_0
TxGFCClk
_1
O
O
Transmit GFC Nibble-Field Serial Input port - Clock Output signal:
These signals, along with TxGFC and TxGFCMSB combine to function as the
Transmit GFC Nibble-field serial input port. These output signals function as the
demand clock signal for this port. The user will specify the value of the GFC
field, within a given ATM cell, by serially transmitting its four bit-value into the
TxGFC input pins. The Transmit GFC Nibble-Field serial input port will latch the
contents of TxGFC upon the rising edge of these clock signals. Hence, the local
terminal equipment should be designed to place its outbound GFC bits on to the
TxGFC line, upon the falling edge of these clock signals.
N
OTE
:
These output pins are only active if the XRT79L72 has been configure to
operate in the ATM Mode.
AA1
V22
TxNib
0
_3/
TxPOHIns
_0
/
TxHDLCDat
0
_3
TxNib
1
_3/
TxPOHIns
_1
/
TxHDLCDat
1
_3
I
I
Transmit Nibble Interface - Bit 3/Transmit PLCP Path Overhead Insert
enable/Transmit HDLC Controller Data Bus - Bit 3 input:
The function of these input pins depend upon whether the XRT79L72 is config-
ured to operate in the Clear-Channel Framer Mode, the High-Speed HDLC Con-
troller Mode or in the ATM/PLCP Mode.
Clear-Channel Framer Mode - TxNib_3:
If the XRT79L72 is configured to operate in the Nibble-Parallel Mode, then these
input pins will function as the bit 3 (MSB) input to the Transmit Nibble-Parallel
input interface. The Transmit Payload Data Input Interface block will sample
these signals (along with TxNib_0 through TxNib_2) upon the falling edge of
TxNibClk.
N
OTE
:
These input pins are inactive if the XRT79L72 is configured to operate in
the Serial Mode.
ATM/PLCP Mode - TxPOHIns:
f the XRT79L72 is configured to operate in the ATM Mode, and if (within the ATM
Mode, the chip is also configured to operate in the PLCP Mode), then these input
pins function as the Transmit PLCP Path Overhead Port - Enable input pin. In
this mode, the user can externally insert desired path overhead byte values into
the outbound PLCP frames.
The Transmit PLCP Path Overhead Input port becomes active whenever the
user asserts these input pins by pulling them "High". Once this occurs, the data,
residing upon the TxPOH input pins will be sampled upon the rising edge of the
TxPOHClk signals.
These input pins are inactive if the XRT79L72 is configured to operate in the
Direct-Mapped ATM Mode.
High-Speed HDLC Controller Mode - TxHDLCDat_3:
If the XRT79L72 is configured to operate in the High-Speed HDLC Controller
mode, then the local terminal equipment will be provided with a byte-wide Trans-
mit HDLC Controller byte-wide input interface. These input pins will function as
Bit 3 within this byte wide interface.
Data, residing on the Transmit HDLC Controller byte wide input interface, will be
sampled upon the rising edge of the TxHDLCClk output signals.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT79L72IB | 2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73 | 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73IB | 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74 | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT79L72IB | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:2 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L73IB | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
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