參數(shù)資料
型號: XRT83VSH28IB
廠商: Exar Corporation
文件頁數(shù): 29/75頁
文件大小: 0K
描述: IC LIU SH E1 OCTAL 225BGA
標準包裝: 84
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1,E1,J1
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應商設備封裝: 225-BGA(19x19)
包裝: 托盤
XRT83VSH28
32
REV. 2.0.0
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
4.0
E1 APPLICATIONS
This applications section describes common E1 system considerations along with references to application
notes available for reference where applicable.
4.1
Loopback Diagnostics
The XRT83VSH28 supports several loopback modes for diagnostic testing. The following section describes
the local analog loopback, remote loopback, digital loopback, and dual loopback modes.
4.1.1
Local Analog Loopback
With local analog loopback activated, the transmit output data at TTIP/TRING is internally looped back to the
analog inputs at RTIP/RRING. External inputs at RTIP/RRING are ignored while valid transmit output data
continues to be sent to the line. A simplified block diagram of local analog loopback is shown in Figure 19.
FIGURE 19. SIMPLIFIED BLOCK DIAGRAM OF LOCAL ANALOG LOOPBACK
NOTE: The transmit diagnostic features such as TAOS and QRSS take priority over the transmit input data at TCLK/TPOS/
TNEG.
4.1.2
Remote Loopback
With remote loopback activated, the receive input data at RTIP/RRING is internally looped back to the transmit
output data at TTIP/TRING. The remote loopback includes the Receive JA (if enabled). The transmit input
data at TCLK/TPOS/TNEG are ignored while valid receive output data continues to be sent to the system. A
simplified block diagram of remote loopback is shown in Figure 20.
FIGURE 20. SIMPLIFIED BLOCK DIAGRAM OF REMOTE LOOPBACK
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
Tx
TAOS
QRSS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
Rx
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
Tx
Rx
TAOS
QRSS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
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