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參數(shù)資料
| 型號(hào)： | XRT83VSH28IB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 48/75頁 |
| 文件大小： | 0K |
| 描述： | IC LIU SH E1 OCTAL 225BGA |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 225-BGA |
| 供應(yīng)商設(shè)備封裝： | 225-BGA（19x19） |
| 包裝： | 托盤 |
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XRT83VSH28
49
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 2.0.0
5.6
PowerPC 403 Synchronous Mode:
In PowerPC mode the active signals are ADDR[7:0], DATA[7:0], CS, R/W (Intel WR), WE (Intel RD), RDY and
PCLK. In this mode all input signals are sampled by the PCLK. For all inputs minimum setup time is 4ns and
minimum hold time is 3ns. Maximum PCLK frequency is 50 MHz.
A READ cycle starts with R/W being 'HIGH' and assertion of CS, address is assumed to be stable at this time
since CS is usually derived from the decoding the address bus.
Operation with wait-states is possible, provided the wait is longer than the minimum cycle time. Use of RDY is
recommended for timing efficiency since the read cycle time can vary depending on the internal address location
being accessed.
WRITE operation is identical to the READ operation except that the cycle starts with R/W being 'LOW', followed
by CS assertion further followed by assertion of WE. Data to be written at the addressed location should be valid
on the data bus at the time WE is asserted. WE should remain asserted until RDY is asserted by the device.
Following RDY assertion WE and CS may be de-asserted.
Note: The value for t25 through t38 can be found in
Table 16.
FIGURE 34. POWERPC 403 MODE TIMING - WRITE OPERATION
Table 16
Power PC403 Mode Timing - Write Operation
Test Conditions: TA = 25°C, VCC = 3.3V±5% and 1.8V±5%, unless otherwise specified
Timing
Description
Min.
Typ.
Max.
Units
t23
R/W "Low" to rising edge of PCLK set-up time (Write Operation)
5-
-
ns
t24
CS "Low" to rising edge of PCLK set-up time
5-
-
ns
t25
Rising edge of PCLK to RDY "Low" delay
4-
-
ns
1
10
9
8
7
6
5
4
3
2
PClk
R/W
WE
D[7:0]
RDY
8 PClk Cycles
ADDR[7:0]
CS
t23
t24
t25
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| XRT83VSH28IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 8 Channel 1.8V-3.3V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83VSH28IB-F | 制造商:Exar Corporation 功能描述:T1/E1 LIU IC |
| XRT83VSH314 | 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83VSH314ES | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 14 CHT1/E1LIUSH LOW COST VERSION RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83VSH314IB | 功能描述:接口 - 專用 14 CH, SH T1/E1 1.8V DGTL/3.3V ANLG RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
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