參數(shù)資料
型號(hào)： XRT83VSH28IB
廠商： Exar Corporation
文件頁(yè)數(shù)： 38/75頁(yè)
文件大?。?/td> 0K
描述： IC LIU SH E1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝： 84
類(lèi)型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.14 V ~ 3.47 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤(pán)
XRT83VSH28
40
REV. 2.0.0
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
5.1.2
24-Bit Serial Data Input Descritption
The serial data input is sampled on the rising edge of SCLK. In readback mode, the serial data output is
updated on the falling edge of SCLK. The serial data must be applied to the LIU LSB first. The 24 bits of serial
data are described below.
5.1.3
ADDR[7:0] (SCLK1 - SCLK8)
The first 8 SCLK cycles are used to provide the address to which a Read or Write operation will occur.
ADDR[0] (LSB) must be sent to the LIU first followed by ADDR[1] and so forth until all 8 address bits have been
sampled by SCLK.
5.1.4
R/W (SCLK9)
The next serial bit applied to the LIU informs the microprocessor that a Read or Write operation is desired. If
the R/W bit is set to “0”, the microprocessor is configured for a Write operation. If the R/W bit is set to “1”, the
microprocessor is configured for a Read operation.
5.1.5
Dummy Bits (SCLK10 - SCLK16)
The next 7 SCLK cycles are used as dummy bits. Seven bits were chosen so that the serial interface can easily
be divided into three 8-bit words to be compliant with standard serial interface devices. The state of these bits
are ignored and can hold either “0” or “1” during both Read and Write operations.
5.1.6
DATA[7:0] (SCLK17 - SCLK24)
The next 8 SCLK cycles are used to provide the data to be written into the internal register chosen by the
address bits. DATA[0] (LSB) must be sent to the LIU first followed by DATA[1] and so forth until all 8 data bits
have been sampled by SCLK. Once 24 SCLK cycles have been completed, the LIU holds the data until CS is
pulled “High” whereby, the serial microprocessor latches the data into the selected internal register.
5.1.7
8-Bit Serial Data Output Description
The serial data output is updated on the falling edge of SCLK17 - SCLK24 if R/W is set to “1”. DATA[0] (LSB) is
provided on SCLK17 to the SDO pin first followed by DATA[1] and so forth until all 8 data bits have been
updated. The SDO pin allows the user to read the contents stored in individual registers by providing the
desired address on the SDI pin during the Read cycle.
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XRT83VSH28IB-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 8 Channel 1.8V-3.3V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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XRT83VSH314 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 14 CHT1/E1LIUSH LOW COST VERSION RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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