參數(shù)資料
型號： XRT86VL32_07
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 116/174頁
文件大?。?/td> 903K
代理商： XRT86VL32_07
XRT86VL32
111
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
1
T
ABLE
98: F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(FIER) H
EX
A
DDRESS
: 0
X
nB05
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
COMFA ENB
R/W
0
Change in CAS Multiframe Alignment Interrupt Enable
This bit permits the user to either enable or disable the “Change in CAS
Multiframe Alignment” Interrupt, within the XRT86VL32 device. If the user
enables this interrupt, then the Receive E1 Framer block will generate an
interrupt in response to either one of the following conditions.
1.
The instant that the Receive E1 Framer block declares the Loss of
CAS Multiframe Alignment condition.
2.
The instant that the Receive E1 Framer block clears the Loss of
CAS Multiframe Alignment condition.
0 – Disables the “Change in CAS Multiframe Alignment” Interrupt.
1 – Enables the “Change in CAS Multiframe Alignment” Interrupt.
6
NBIT ENB
R/W
0
Change in National Bits Interrupt Enable
This bit permits the user to either enable or disable the “Change in
National Bits” Interrupt, within the XRT86VL32 device. If the user enables
this interrupt, then the Receive E1 Framer block will generate an interrupt
when it detects a change in the National Bits (Sa4-Sa8) within the channel.
0 = Disables the Change in National Bits Interrupt
1 - Enables the Change in National Bits Interrupt
5
SIG ENB
R/W
0
Change in CAS Signaling Bits Interrupt Enable
This bit permits the user to either enable or disable the “Change in CAS
Signaling Bits” Interrupt, within the XRT86VL32 device. If the user enables
this interrupt, then the Receive E1 Framer block will generate an interrupt
when it detects a change in the any four signaling bits (A,B,C,D) in any one
of the 30 signaling channels. Users can read the signaling change regis-
ters (address 0xn10D-0xn110) to determine which signalling channel has
changed state.
0 = Disables the Change in Signaling Bits Interrupt
1 - Enables the Change in Signaling Bits Interrupt
N
OTE
:
This bit has no meaning when Channel Associated Signaling is
disabled.
4
COFA ENB
R/W
0
Change of FAS Framing Alignment (COFA) Interrupt Enable
This bit permits the user to either enable or disable the “Change in FAS
Framing Alignment (COFA)” Interrupt, within the XRT86VL32 device. If the
user enables this interrupt, then the Receive E1 Framer block will generate
an interrupt when it detects a Change of FAS Framing Alignment Signal
(e.g., the FAS bits have appeared to move to a different location within the
incoming E1 data stream).
0 – Disables the “Change of FAS Framing Alignment (COFA)” Interrupt.
1 – Enables the “Change of FAS Framing Alignment (COFA)” Interrupt.
相關(guān)PDF資料
PDF描述
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