參數(shù)資料
型號： XRT86VL32_07
廠商： Exar Corporation
元件分類： 通信及網絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 99/174頁
文件大小： 903K
代理商： XRT86VL32_07
XRT86VL32
94
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
80: PMON R
ECEIVE
F
AR
-E
ND
BL
OCK
E
RROR
C
OUNTER
- MSB (RFEBECU) H
EX
A
DDRESS
: 0
X
n907
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
RFEBEC[15]
RUR
0
Performance Monitor - Receive Far-End Block Error 16-Bit
Counter - Upper Byte:
These RESET-upon-READ bits, along with that within the “PMON
Receive Far-End Block Error Counter Register LSB” combine to
reflect the cumulative number of instances that the Receive Far-End
Block errors has been detected by the Receive E1 Framer block
since the last read of this register.
This register contains the Most Significant byte of this 16-bit of the
Receive Far-End Block Error counter.
N
OTE
:
The Receive Far-End Block Error Counter will increment
once each time the received E-bit is set to zero. This
counter is disabled during loss of sync at either the FAS or
CRC-4 level and it will continue to count if loss of multiframe
sync occurs at the CAS level.
N
OTE
:
For all 16-bit wide PMON registers, user must read the MSB
counter first before reading the LSB counter in order to read
the accurate PMON counts. To clear PMON count, user
must read the MSB counter first before reading the LSB
counter in order to clear the PMON count.
6
RFEBEC[14]
RUR
0
5
RFEBEC[13]
RUR
0
4
RFEBEC[12]
RUR
0
3
RFEBEC[11]
RUR
0
2
RFEBEC[10]
RUR
0
1
RFEBEC[9]
RUR
0
0
RFEBEC[8]
RUR
0
T
ABLE
81: PMON R
ECEIVE
F
AR
E
ND
B
LOCK
E
RROR
C
OUNTER
-LSB (RFEBECL) H
EX
A
DDRESS
: 0
X
n908
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
RFEBEC[7]
RUR
0
Performance Monitor - Receive Far-End Block Error 16-Bit
Counter - Lower Byte:
These RESET-upon-READ bits, along with that within the “PMON
Receive Far-End Block Error Counter Register MSB” combine to
reflect the cumulative number of instances that the Receive Far-End
Block errors has been detected by the Receive E1 Framer block
since the last read of this register.
This register contains the Least Significant byte of this 16-bit of the
Receive Far-End Block Error counter.
N
OTE
:
The Receive Far-End Block Error Counter will increment
once each time the received E-bit is set to zero. This
counter is disabled during loss of sync at either the FAS or
CRC-4 level and it will continue to count if loss of multiframe
sync occurs at the CAS level.
N
OTE
:
For all 16-bit wide PMON registers, user must read the MSB
counter first before reading the LSB counter in order to read
the accurate PMON counts. To clear PMON count, user
must read the MSB counter first before reading the LSB
counter in order to clear the PMON count.
6
RFEBEC[6]
RUR
0
5
RFEBEC[5]
RUR
0
4
RFEBEC[4]
RUR
0
3
RFEBEC[3]
RUR
0
2
RFEBEC[2]
RUR
0
1
RFEBEC[1]
RUR
0
0
RFEBEC[0]
RUR
0
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PDF描述
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相關代理商/技術參數(shù)
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XRT86VL32IB-F 功能描述:網絡控制器與處理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL34 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
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