參數(shù)資料
型號(hào): XRT86VL38_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 66/160頁
文件大?。?/td> 860K
代理商: XRT86VL38_2
XRT86VL38
61
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
T
ABLE
44: D
ATA
L
INK
C
ONTROL
R
EGISTER
(DLCR2) H
EX
A
DDRESS
: 0
X
n143
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
SLC-96 Data Link
Enable
R/W
0
SLC96 DataLink Enable
This bit permits the user to configure the channel to support the
transmission and reception of the “SLC-96 type” of data-link mes-
sage.
0 - Channel does not support the transmission and reception of
“SLC-96” type of data-link messages. Regular SF framing bits will
be transmitted.
1 - Channel supports the transmission and reception of the “SLC-
96” type of data-link messages.
N
OTE
:
This bit is only active if the channel has been configured to
operate in either the SLC-96 or the ESF Framing formats.
6
MOS ABORT Disable
R/W
0
MOS ABORT Disable:
This bit permits the user to either enable or disable the “Automatic
MOS ABORT” feature within Transmit HDLC Controller # 2. If the
user enables this feature, then Transmit HDLC Controller block # 2
will automatically transmit the ABORT Sequence (e.g., a zero fol-
lowed by a string of 7 consecutive “1s”) whenever it abruptly transi-
tions from transmitting a MOS type of message, to transmitting a
BOS type of message.
If the user disables this feature, then the Transmit HDLC Controller
Block # 2 will NOT transmit the ABORT sequence, whenever it
abruptly transitions from transmitting a MOS-type of message to
transmitting a BOS-type of message.
0 - Enables the “Automatic MOS Abort” feature
1 - Disables the “Automatic MOS Abort” feature
5
Rx_FCS_DIS
R/W
0
Receive Frame Check Sequence (FCS) Verification Enable/Dis-
able
This bit permits the user to configure the Receive HDLC Controller
Block # 2 to compute and verify the FCS value within each incoming
LAPD message frame.
0 - Enables FCS Verification
1 - Disables FCS Verification
4
AutoRx
R/W
0
Auto Receive LAPD Message
This bit configures the Receive HDLC Controller Block #2 to discard
any incoming BOS or LAPD Message frame that exactly match
which is currently stored in the Receive HDLC1 buffer.
0 = Disables this “AUTO DISCARD” feature
1 = Enables this “AUTO DISCARD” feature.
3
Tx_ABORT
R/W
0
Transmit ABORT
This bit configures the Transmit HDLC Controller Block # 2 to trans-
mit an ABORT sequence (string of 7 or more consecutive 1’s) to the
Remote terminal.
0 - Configures the Transmit HDLC Controller Block # 2 to function
normally (e.g., not transmit the ABORT sequence).
1 - Configures the Transmit HDLC Controller block # 2 to transmit
the ABORT Sequence.
相關(guān)PDF資料
PDF描述
XRT86VL38IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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