參數(shù)資料
型號： XRT86VL3X_07
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 81/153頁
文件大?。?/td> 1316K
代理商： XRT86VL3X_07
XRT86VL3X
74
REV. 1.2.2
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
The mapping of T1 frame into E1 framing format is shown in the table below.
8.2.2
Non-Multiplexed High-Speed Mode
When the Back-plane interface data rate is MVIP 2.048Mbit/s, 4.096Mbit/s and 8.192Mbit/s, the interface
signals are all configured as inputs, except the receive serial data on RxSER and the multi frame sync pulse
(RxMSYNC) provided by the framer. The Transmit Serial Clock for each channel is always an input clock with
frequency of 1.544 MHz for all data rates so that it may be used as the timing reference for the transmit line
rate. The TxMSYNC signal is configured as the Transmit Input Clock with frequencies of 2.048 MHz, 4.096
MHz and 8.192 MHz respectively. It serves as the primary clock source for the High-speed Back-plane
Interface.
Figure 81
shows how to connect the Transmit non-multiplexed high-speed Input Interface block to
local Terminal Equipment.
Figure 82
shows how to connect the Receive non-multiplexed high-speed Output
Interface to local Terminal Equipment.
T
ABLE
6: M
APPING
A
T1 F
RAME
INTO
AN
E1 F
RANE
T1
F-Bit
TS0
TS1
TS2
Don't Care Bits
TS3
TS4
TS5
E1
TS0
TS1
TS2
TS3
TS4
TS5
TS6
TS7
T1
Don't Care Bits
TS6
TS7
TS8
Don't Care Bits
TS9
TS10
TS11
E1
TS8
TS9
TS10
TS11
TS12
TS13
TS14
TS15
T1
Don't Care Bits
TS12
TS13
TS14
Don't Care Bits
TS15
TS16
TS17
E1
TS16
TS17
TS18
TS19
TS20
TS21
TS22
TS23
T1
Don't Care Bits
TS18
TS19
TS20
Don't Care Bits
TS21
TS22
TS23
E1
TS24
TS25
TS26
TS27
TS28
TS29
TS30
TS31
F
IGURE
81. T
RANSMIT
N
ON
-M
ULTIPLEXED
H
IGH
-S
PEED
C
ONNECTION
TO
LOCAL
TERMINAL
EQUIPMENT
USING
MVIP
2.048M
BIT
/
S
, 4.096M
BIT
/
S
,
OR
8.192M
BIT
/
S
TxSERCLK0
TxSER0
TxINCLK0
TxSYNC0
Transmit
Payload
Data Input
Interface
Chn 0
Transmit
Payload
Data Input
Interface
Chn N
Terminal
Equipment
XRT86VL3x
TxSERCLKn
TxSERn
TxINCLKn
TxSYNCn
TxINCLK = 2.048/4.096/8.192MHz
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