參數(shù)資料
型號: XRT91L32IQTR
廠商: Exar Corporation
文件頁數(shù): 37/37頁
文件大?。?/td> 0K
描述: IC TXRX SONET/SDH 8BIT 100QFP
產(chǎn)品變化通告: XRT91L32IQ(TR) Obsolescence 12/Oct/2010
標(biāo)準(zhǔn)包裝: 1,000
類型: 收發(fā)器
規(guī)程: SONET/SDH
電源電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 100-BQFP
供應(yīng)商設(shè)備封裝: 100-QFP(14x20)
包裝: 帶卷 (TR)
xr
XRT91L32
REV. 1.0.3
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
7
TXPCLK_O
LVTTL
O
82
Transmit Parallel Clock Output (77.76/19.44 MHz)
Transmit Parallel Clock Output Operation
This pin will output a 77.76 MHz (STS-12/STM-4) or 19.44 MHz
(STS-3/STM-1) clock output reference for the 8-bit parallel
transmit data input TXDI[7:0]. This clock is used by the framer/
mapper device to present the TXDI[7:0] data which the
XRT91L32 will latch on the rising edge of this clock. This
enables the framer/mapper device and the XRT91L32 trans-
ceiver to be in synchronization.
REFCLKP
REFCLKN
LVPECL Diff
I
29
30
Reference Clock Input (77.76 MHz or 19.44 MHz)
This differential clock input reference is used for the transmit
clock multiplier unit (CMU) and clock data recovery (CDR) to
provide the necessary high speed clock reference for this
device. It will accept either a 77.76 MHz or a 19.44 MHz Differ-
ential LVPECL clock source. Pin CMUFREQSEL determines
the value used as the reference. See Pin CMUFREQSEL for
more details. REFCLKP/N inputs are internally biased to 1.65V.
NOTE:
In the event that TTLREFCLK LVTTL input is used
instead of these differential inputs for clock reference,
the REFCLKP should be tied to ground.
TTLREFCLK
LVTTL
I
56
Auxillary Reference Clock Input (77.76 MHz or 19.44 MHz)
This LVTTL clock input reference is used for the transmit clock
multiplier unit (CMU) and clock data recovery (CDR) to provide
the necessary high speed clock reference for this device. It will
accept either a 77.76 MHz or a 19.44 MHz LVTTL clock source.
Pin CMUFREQSEL determines the value used as the refer-
ence. See Pin CMUFREQSEL for more details.
NOTE: In the event that REFCLKP/N differential inputs is used
instead of this LVTTL input for clock reference, the
TTLREFCLK should be tied to ground.
TRANSMITTER SECTION
NAME
LEVEL
TYPE
PIN
DESCRIPTION
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