TABLE
參數(shù)資料
型號: XRT91L34IV
廠商: Exar Corporation
文件頁數(shù): 21/38頁
文件大?。?/td> 0K
描述: IC MULTIRATE CDR QUAD 128LQFP
標準包裝: 72
類型: 時鐘和數(shù)據(jù)恢復(CDR),扇出緩沖器(分配),多路復用器
PLL:
主要目的: SONET/SDH,STS,STM
輸入: LVDS,LVPECL
輸出: LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 622.08MHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x14)
包裝: 托盤
XRT91L34
28
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
REV. 1.0.1
TABLE 10: MICROPROCESSOR INTERFACE REGISTER 0X01 BIT DESCRIPTION
CHANNEL INTERRUPT STATUS REGISTER (0X01)
BIT
NAME
FUNCTION
Regis-
ter
Type
Default
Value
(HW Reset)
D7
Reserved
This Register Bit is Not Used
RO
0
D6
Reserved
This Register Bit is Not Used
RO
0
D5
Reserved
This Register Bit is Not Used
RO
0
D4
Reserved
This Register Bit is Not Used
RO
0
D3
INTS3
Channel 3 Interrupt Status
This bit indicates an interrupt occuring in Channel 3.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D2
INTS2
Channel 2 Interrupt Status
This bit indicates an interrupt occuring in Channel 2.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D1
INTS1
Channel 1 Interrupt Status
This bit indicates an interrupt occuring in Channel 1.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D0
INTS0
Channel 0 Interrupt Status
This bit indicates an interrupt occuring in Channel 0.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
TABLE 11: MICROPROCESSOR INTERFACE REGISTER 0X02 BIT DESCRIPTION
DEVICE "ID" REGISTER (0X02)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
D6
D5
D4
D3
D2
D1
D0
Device "ID"
MSB
The device "ID" of the XRT91L34 CDR is 0x8405h. Along with the
revision "ID", the device "ID" is used to enable software to identify
the silicon adding flexibility for system control and debug.
RO
1
0
1
0
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