參數(shù)資料
型號(hào)： XRT91L81IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： TRANSCEIVER, PBGA196
封裝： 12 X 12 MM, STBGA-196
文件頁(yè)數(shù)： 34/40頁(yè)
文件大?。?/td> 264K
代理商： XRT91L81IB
XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
PRELIMINARY
32
D5
TXO2SEL
Secondary Transmit Serial Output Select
This bit is used to select between serial data and a reference clock
for the secondary transmit serial output.
"0" = 2.488Gbit/s Serial Output Data
"1" = Transmit Output Clock (2.488/2.666 GHz)
R/W
0
D4
LOOPBW
CMU Loop Band Width Select
This bit is used to select the bandwidth of the clock multiplier unit
of the transmit path to a narrow or wide band.
"0" = Narrow Band (1x)
"1" = Wide Band (4x)
R/W
0
D3
VCXOSEL
VCXO De-Jitter Select
This bit selects either the normal REFCLK or the de-jitter VCXO as
a reference clock.
"0" = Normal REFCLK Mode
"1" = De-Jitter VCXO Mode
R/W
0
D2
TRITXCLKO16
Auxillary Output Clock Tri-State
This bit is used to tri-state the auxillary clock.
"0" = TXCLKO16 Enabled
"1" = TXCLKO16 Tri-State
R/W
0
D1
AUTORST
Automatic FIFO Overflow Reset
If this bit is set to "1", the OC-48 transceiver will automatically flush
the FIFO upon an overflow condition. Upon power-up, the FIFO
should be manually reset by setting FIFO_RST to "1" for 10 cycles
of TXCLK.
"0" = Manual FIFO reset required for overflow conditions
"1" = Automatically resets FIFO upon overflow detection
R/W
0
D0
FIFORST
Manual FIFO Reset
FIFORST should be set to "1" for 10 cycles of TXCLK during
power-up in order to flush out the FIFO. Upon an interrupt indica-
tion that the FIFO has an overflow condition, this bit is used to
reset or flush out the FIFO.
N
OTE
:
To automaically reset the FIFO, see the AUTORST bit.
R/W
0
T
ABLE
10: M
ICROPROCESSOR
R
EGISTER
B
IT
D
ESCRIPTION
C
HANNEL
0 C
ONTROL
R
EGISTER
(0
X
03
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
相關(guān)PDF資料
PDF描述
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT94L31_07 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
XRT94L31 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L31IB 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L82 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT94L31 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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