參數(shù)資料
型號(hào): XWM8711EDS
廠商: Wolfson Microelectronics
英文描述: Internet Audio DAC with Integrated Headphone Driver
中文描述: 互聯(lián)網(wǎng)音頻DAC集成耳機(jī)驅(qū)動(dòng)器
文件頁數(shù): 7/36頁
文件大?。?/td> 379K
代理商: XWM8711EDS
WM8711
Product Preview
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 November 2000
7
DIGITAL AUDIO INTERFACE – MASTER MODE
BCLK
(Output)
DACLRC
(Output)
DACDAT
t
DLT
t
DHT
t
DL
Figure 2 Digital Audio Data Timing - Master Mode
Test Conditions
AVDD, HPVDD, DVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T
A
= +25
o
C, Slave Mode, fs = 48kHz, XTI/MCLK =
256fs unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
DACLRC propagation delay
from BCLK falling edge
DACDAT setup time to
BCLCK rising edge
DACDAT hold time from
BCLK rising edge
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
DL
0
10
ns
t
DST
10
ns
t
DHT
10
ns
DIGITAL AUDIO INTERFACE – SLAVE MODE
BCLK
(Input)
DACLRC
(Input)
t
BCH
t
BCL
t
BCY
DACDAT
t
LRSU
t
DS
t
LRH
Figure 3
Digital Audio Data Timing
Slave Mode
Test Conditions
AVDD, HPVDD, DVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T
A
= +25
o
C, slave mode, fs = 48kHz, MCLK = 256fs
unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
DACLRC set-up time to
BCLK rising edge
DACLRC hold time from
BCLK rising edge
DACDAT set-up time to
BCLK rising edge
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
BCY
t
BCH
t
BCL
t
LRSU
50
20
20
10
ns
ns
ns
ns
t
LRH
10
ns
t
DS
10
ns
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