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參數(shù)資料
| 型號： | ZL30410QCC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | CONN SOCKET R/A 4R0W 24POS SLD |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP80 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, MS-026BEC, LQFP-80 |
| 文件頁數(shù)： | 9/38頁 |
| 文件大小： | 400K |
| 代理商： | ZL30410QCC |
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ZL30410
Data Sheet
9
Zarlink Semiconductor Inc.
Figure 3 - Core PLL Functional Block Diagram
2.2.1 Digitally Controlled Oscillator (DCO)
The DCO is an arithmetic unit that continuously generates a stream of numbers that represent the phase-locked
clock. These numbers are passed to the Clock Synthesizer (see section 2.3) where they are converted into
electrical clock signals of various frequencies.
2.2.2 Filters
In Normal mode, the clock generated by the DCO is phase-locked to the input reference signal and band-limited to
meet synchronization standards. The ZL30410 provides two hardware selectable (FCS pin) filtering options. The
filtering characteristics are similar to a first order low pass filter with corner frequencies that support international
standards:
-
6 Hz
filter: supports G.813 Option 1 Clock
-
12 Hz
filter: supports line card applications for G.812, G.813, GR-1244 and GR-253
2.2.3 Lock Indicator (LOCK)
The ZL30410 is considered locked (LOCK pin high) when the residual phase movement after declaring locked
condition does not exceed 20 ns; as required by standard wander generation MTIE and TDEV tests. To ensure the
integrity of the LOCK status indication, the ZL30410 holds LOCK pin low for a minimum of one second before
declaring lock. The ZL30410’s locking process allows it to lock within the specified locking times to references with
a fractional frequency offset of up to ±20 ppm.
2.2.4 Reference Alignment (RefAlign)
When the ZL30410 finishes locking to a reference an arbitrary phase difference will remain between its output
clocks and its reference; this phase difference is part of the normal operation of the ZL30410. If so desired, the
output clocks can be brought into phase alignment with the PLL reference by using the RefAlign control pin.
FSM
DCO
Filters
Phase
Detector
MUX
LOCK
RefAlign
FCS
HOLDOVER
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