參數(shù)資料
型號： ZL38002
廠商： Zarlink Semiconductor Inc.
英文描述： Low-Voltage Acoustic Echo Canceller With Noise Reduction
中文描述： 低電壓聲回波抵消與降噪
文件頁數(shù)： 4/47頁
文件大?。?/td> 440K
代理商： ZL38002
ZL38002
Data Sheet
4
Zarlink Semiconductor Inc.
18
17
CS
Serial Port
Chip Select (Input).
Enables serial microport interface data
transfers. Active low.
19
19
DATA2
Serial Data Receive (Input).
In Motorola/National serial microport
operation, the DATA2 pin is used for receiving data. In Intel serial microport
operation, the DATA2 pin is not used and must be tied to Vss or Vdd.
20
21
DATA1
Serial Data Port (Bidirectional).
In Motorola/National serial microport
operation, the DATA1 pin is used for transmitting data. In Intel serial
microport operation, the DATA1 pin is used for transmitting and receiving
data.
22
23
VDD
Positive Power Supply (Input
). Nominally 3.3 volts.
23
24
Sout
Send PCM Signal Output (Output).
128 kbps to 4096 kbps serial PCM
output stream. Data may be in either companded or 2’s complement linear
PCM format. This is the Send Out signal after acoustic echo cancellation
and non-linear processing. Data bits are clocked out following SSI, ST-
BUS or GCI timing requirements.
24
26
Rout
Receive PCM Signal Output (Output).
128 kbps to 4096 kbps serial PCM
output stream. Data may be in either companded or 2’s complement linear
PCM format. This is the Receive out signal after the AGC and gain control.
Data bits are clocked out following SSI, ST-BUS or GCI timing
requirements.
25
27
F0i
Frame Pulse (Input).
In ST-BUS (or GCI) operation, this is an active-low
(or active-high) frame alignment pulse, respectively. SSI operation is
enabled by connecting this pin to Vss.
26
29
BCLK/C4i
Bit Clock/ST-BUS Clock (Input).
In SSI operation, BCLK pin is a 128 kHz
to 4.096 MHz bit clock. This clock must be synchronous with ENA1 and
ENA2 enable strobes.
In ST-BUS or GCI operation, C4i pin must be connected to the 4.096 MHz
(C4) system clock.
27, 28
30, 31
IC
Internal Connection (Input).
Tie to Vss.
29
33
VSS2
Digital Ground (Input).
Nominally 0 volts.
30
34
VDD2
Positive Power Supply (Input).
Nominally 3.3 volts (tie together with
VDD).
31
35
VSS
Digital Ground (Input).
Nominally 0 volts (tie together with VSS2).
33
38
MCLK2
Master Clock (Input).
Nominal 20 MHz master clock (tie together with
MCLK).
34,35,36
39, 40, 41
IC
Internal Connection (Input).
Tie to Vss.
15, 16, 21,
32
1, 4, 10, 12,
14, 15, 18,
20, 22, 25,
28, 32, 36,
37, 42, 44
NC
No Connect (Output).
This pin should be left unconnected.
Pin Description (continued)
QSOP
Pin #
TQFP
Pin #
Name
Description
相關PDF資料
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相關代理商/技術參數(shù)
參數(shù)描述
ZL38002_07 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Echo Canceller for Hands Free Communication
ZL38002DGA1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low-Voltage Acoustic Echo Canceller With Noise Reduction
ZL38002DGB1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low-Voltage Acoustic Echo Canceller With Noise Reduction
ZL38002DGE1 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 1CH G.711 W/OUT TONE DETECTION 36QSOP /B - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC ECHO CANCELLER AEC 36SSOP 制造商:Microsemi Corporation 功能描述:IC ECHO CANCELLER AEC 36SSOP
ZL38002DGF1 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 1CH G.711 W/OUT TONE DETECTION 36QSOP /B - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC ECHO CANCELLER AEC 36SSOP 制造商:Microsemi Corporation 功能描述:IC ECHO CANCELLER AEC 36SSOP
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