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參數(shù)資料
| 型號： | ZL50012 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Flexible 512-ch Digital Switch |
| 中文描述： | 靈活的512通道數(shù)字開關 |
| 文件頁數(shù)： | 36/65頁 |
| 文件大?。?/td> | 1145K |
| 代理商： | ZL50012 |
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ZL50012
Data Sheet
39
Zarlink Semiconductor Inc.
Table 17 - BER Start Receiving Register (BSRR) Bits
0
MBPS
Memory Block Programming Start:
A zero to one transition of this bit starts the
memory block programming function. The MBPS, BPD0 to BPD2 bits in this register
must be defined in the same write operation. Once the MBPE bit in the control register
is set to high, the device requires 50
μ
s to complete the block programming. After the
programming function has finished, the MBPS bit returns to low indicating the opera-
tion is completed. When the MBPS is high, the MBPS or MBPE can be set to low to
abort the programming operation.
To ensure proper block programming operation, when MBPS is high the BPD0 to
BPD2 bits in this register must not be changed.
Whenever the microprocessor writes a one to the MBPS bit, the block programming
function is started, the user must maintain the same logical value to the other bits in
this register to avoid any change in the device setting.
Bit
Name
Description
15 - 13
8 - 7
Unused
Reserved.
In normal functional mode, these bits MUST be set to zero.
12 - 9
BRSA3 - 0
BER Receive Stream Address Bits:
The binary value of these bits refers to the input
stream which receives the BER data.
6 - 0
BRCA6 - 0
BER Receive Channel Address Bits:
The binary value of these bits refers to the
input channel in which the BER data starts to be compared.
Bit
Name
Description
Table 16 - Internal Mode Selection (IMS) Register Bits (continued)
External Read/Write Address: 001
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
CKINP
FPINP
CK2P
FP2P
CK1P
FP1P
CK0P
FP0P
BPD
2
BPD
1
BPD
0
MBPS
External Read/Write Address: 010
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
BR
SA3
BR
SA2
BR
SA1
BR
SA0
0
0
BR
CA6
BR
CA5
BR
CA4
BR
CA3
BR
CA2
BR
CA1
BR
CA0
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| ZL50015 | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| ZL50015GAC | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| ZL50015QCC | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| ZL50015QCC1 | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| ZL50018 | 2 K Digital Switch with Enhanced Stratum 3 DPLL |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50012/GDC | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 3.3V 144LBGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 512CH 144LBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 512CH 144LBGA |
| ZL50012/QCC | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 3.3V 160LQFP - Trays |
| ZL50012_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 512-ch Digital Switch |
| ZL50012GDC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 512-ch Digital Switch |
| ZL50012GDG2 | 制造商:Microsemi Corporation 功能描述:Switch Fabric 256 x 256 3.3V 144-Pin LBGA Tray 制造商:Microsemi Corporation 功能描述:TDM SWITCH 512X512 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 3.3V 144LBGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 512CH 144LBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 512CH 144LBGA |
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