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參數(shù)資料
| 型號： | μPD705100 |
| 廠商： | NEC Corp. |
| 英文描述： | 32 Bit Microprocessor(32 位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數(shù)： | 23/81頁 |
| 文件大小： | 441K |
| 代理商： | ΜPD705100 |
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23
CHAPTER 2 PIN FUNCTIONS
(4)
BE0, BE1 (Byte Enable): tristate output
Output the signal indicating which byte in the 32-bit data bus should be accessed when the CPU is
accessing main external storage or an input/output device. The pins change in synchronization with
the rise of a bus clock pulse in the Ta state.
BE0: D0-D7
BE1: D8-D15
Data size
Address
32-bit mode
16-bit mode
A1
A0
BE3
BE2
BE1
BE0
A1
BH
BE1
BE0
Byte access
0
0
1
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
1
0
1
0
1
1
1
1
1
0
1
1
0
1
1
1
1
1
0
1
Halfword access
0
0
1
1
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
Word access
First time
0
0
0
0
0
0
0
0
0
0
Second
1
0
0
0
Burst transfer
Note
0
0
0
0
0
0
0/1
0
0
0
Note
Data is transferred four times in 32-bit bus mode and eight times in 16-bit bus mode. For details,
see
Section 4.1
(for 32-bit bus mode) and
Section 5.2
(for 16-bit bus mode).
(5)
BE2/BH (Byte Enable/Byte or Halfword): tristate output
Indicates access to D16-D23 on the 32-bit data bus when the CPU is accessing main external storage
or an input/output device. In 16-bit bus mode, a signal indicating byte or halfword access is output. The
pin changes in synchronization with the rise of a bus clock pulse in the Ta state.
(6)
BE3/A1 (Byte Enable/Address): tristate output
Outputs a signal indicating access to the most significant byte on the 32-bit data bus when the CPU is
accessing main external storage or an input/output device. The pin changes in synchronization with
the rise of a bus clock pulse in the Ta state. In 16-bit bus mode, address A1 is output. The pin changes
in synchronization with the rise of a bus clock pulse in the Ta, Tw2, Tb2-Tb8 states. For details, see
Section 4.2
(for 32-bit bus mode) and
Section 5.3
(for 16-bit bus mode).
(7)
ST0-ST3 (Status): tristate output
Indicate the status of the current bus cycle and the CPU. The pins change in synchronization with a
bus clock pulse. They also change in cycles other than a bus cycle.
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