- 您現(xiàn)在的位置：買賣IC網 > PDF目錄382783 > μPD705100 (NEC Corp.) 32 Bit Microprocessor(32 位微處理器) PDF資料下載
參數(shù)資料
| 型號： | μPD705100 |
| 廠商： | NEC Corp. |
| 英文描述： | 32 Bit Microprocessor(32 位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數(shù)： | 37/81頁 |
| 文件大?。?/td> | 441K |
| 代理商： | ΜPD705100 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁
37
CHAPTER 4 32-BIT BUS MODE
(4) Tb1-Tb4 states
The bus enters the Tbn state upon the termination of the n-th access to a point external to the processor,
or when it is forced to wait. READY (input) is sampled at the first rising edge of the bus clock after
termination of the state. If the sampled READY (input) is inactive, the bus re-enters the Tbn state.
If READY (input), sampled during a read, is active, the data on the data bus is read and the state
terminates. If the bus is originally in the Tb4 state, however, it enters the Ti state.
During a write in this state, write data is output in sync with the rising edge of the bus clock.
HLDRQ (input) is sampled at the rising edge of the bus clock in the last Tb4 state.
(5) Th state
The bus enters the Th state when it is held by HLDRQ (input). In this state, HLDRQ (input) is sampled
at the rising edge of the bus clock. If it is inactive, the bus enters the Ti state.
Figure 4-3. Bus Cycle State Transitions (32-Bit Bus Mode)
Th
Ti
Ta
Ta4
Tb3
Tb1
Tb2
Ts
<10>
<8>
<9>
<11>
<4>
<1>
<4><2>
<3>
<5>
<5>
<6>
<3>
<7>
<3>
<7>
<3>
<7>
<3>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<8>
<9>
<10>
HLDRQ=0
<11>
HLDRQ=1
(HLDRQ=1 or bus locked) and (cause of access)
Single transfer
READY=1
READY=0 and (HLDRQ=0 or [no cause of access] or [read bus cycle in effect] or [bus locked])
READY=0 and (HLDRQ=1 and [cause of access] and [write bus cycle in effect] and [bus not locked])
Burst transfer
READY=0
HLDRQ=1 and (no cause of access)
HLDRQ=0 and (bus not locked)
相關PDF資料 |
PDF描述 |
|---|---|
| μPD705101 | 32 Bit Microprocessor(32 位微處理器) |
| μPD705102GM-143-8ED | 32 Bit RISC Microcontrollers(32 位RISC 微控制器) |
| μPD705102 | 32 Bit Single Chip Microcontrollers(32 位單片微控制器) |
| μPD70F3003A | 16/32 Bit RISC Microcontrollers(16/32位單片微控制器) |
| μPD703005A | 16/32 Bit Single Chip Microcontrollers(16/32位單片微控制器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PD7087 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:InGaAs PIN PHOTO DIODES |
| PD7088 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:InGaAs PIN PHOTO DIODES |
| PD708C7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:InGaAs PIN PHOTO DIODES |
| PD708C8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:InGaAs PIN PHOTO DIODES |
| PD70CNT12M5MH | 制造商:Carlo Gavazzi 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。