參數(shù)資料
型號: 20-101-0732
廠商: Rabbit Semiconductor
文件頁數(shù): 44/126頁
文件大?。?/td> 0K
描述: INTERFACE SMART SCREEN OP7100
標準包裝: 1
系列: SBC
模塊/板類型: 單板計算機模塊
適用于相關(guān)產(chǎn)品: OP7100
其它名稱: 20-101-732
20-101-732-ND
OP7100
24
Hardware
OP7100 Subsystems Overview
The OP7100 consists of several subsystems, including a computing module,
serial communication channels, lquid crystal display (LCD), a buzzer, and a
keypad interface. Figure 3-1 provides a block diagram of the OP7100.
Figure 3-1. OP7100 Block Diagram
Computing Module
The OP7100 computing module consists of a Zilog Z180 microprocessor,
128K of battery-backed static RAM, and 512K of flash EPROM. The
computing module operates in tandem with a real-time clock and a
watchdog timer/microprocessor supervisor.
The Z180 CPU runs at 18.432 MHz, and the LCD controller runs at
9.216 MHz.
The watchdog timer/microprocessor chip provides a watchdog timer
function, power-failure detection, RAM protection, and battery backup.
The real-time clock provides time and date information to applications
running on the OP7100.
The EEPROM is simulated in flash EPROM for consistency
with Rabbit Semiconductor controllers whose software
libraries rely on exchanging information with the EEPROM.
The simulated EEPROM in the OP7100 is unused at the
present time, but addresses 0 and 1 are reserved for furture
use. Do not use these addresses in your application.
Flash2
SRAM
RTC
Batt.
Z180
Flash1
8
LCD
Control
VRAM2
VRAM1
’691
super.
Keypad
Interface
EPLD
Backlight
RS-232
RS-485
LCD
320 x 240
8
Optional Software
Contrast Adjustment
Drive
Sense
Buzzer
Touchscreen
8
Digital
I/O
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