56F802 Technical Data, Rev. 7
14
Freescale Semiconductor
Part 3 Specifications
3.1 General Characteristics
The 56F802 is fabricated in high-density CMOS with 5-volt tolerant TTL-compatible digital inputs. The
term “5-volt tolerant” refers to the capability of an I/O pin, built on a 3.3V compatible process technology,
to withstand a voltage up to 5.5V without damaging the device. Many systems have a mixture of devices
designed for 3.3V and 5V power supplies. In such systems, a bus may carry both 3.3V and 5V- compatible
I/O voltage levels (a standard 3.3V I/O is designed to receive a maximum voltage of 3.3V
±
10% during
normal operation without causing damage). This 5V-tolerant capability therefore offers the power savings
of 3.3V I/O levels while being able to receive 5V levels without being damaged.
Absolute maximum ratings given in
Table 3-1
are stress ratings only, and functional operation at the
maximum is not guaranteed. Stress beyond these ratings may affect device reliability or cause permanent
damage to the device.
The 56F802 DC and AC electrical specifications are preliminary and are from design simulations. These
specifications may not be fully tested or guaranteed at this early stage of the product life cycle. Finalized
specifications will be published after complete characterization and device qualifications have been
completed.
CAUTION
This device contains protective circuitry to guard against
damage due to high static voltage or electrical fields.
However, normal precautions are advised to avoid
application of any voltages higher than maximum rated
voltages to this high-impedance circuit. Reliability of
operation is enhanced if unused inputs are tied to an
appropriate voltage level.
Table 3-1 Absolute Maximum Ratings
Characteristic
Symbol
Min
Max
Unit
Supply voltage
V
DD
V
SS
– 0.3
V
SS
+ 4.0
V
All other input voltages, excluding Analog inputs
V
IN
V
SS
– 0.3
V
SS
+ 5.5V
V
Analog Inputs ANAx, V
REF
V
IN
V
SS
– 0.3
V
DDA
+ 0.3V
V
Current drain per pin excluding V
DD
, V
SS
, & PWM ouputs
I
—
10
mA