參數(shù)資料
型號: 56F802
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 28/40頁
文件大?。?/td> 2472K
代理商: 56F802
56F802 Technical Data, Rev. 7
28
Freescale Semiconductor
3.9 Analog-to-Digital Converter (ADC) Characteristics
Table 3-13 ADC Characteristics
Characteristic
Symbol
Min
Typ
Max
Unit
ADC input voltages
V
ADCIN
0
1
1.
to a digital output code of 0 or cause erroneous conversions.
For optimum ADC performance,keep the minimum V
ADCIN
value > 250mV. Inputs less than 250mV volts may convert
V
REF2
2.
V
REF
must be equal to or less than V
DDA
- 0.3V and must be greater than 2.7V.
Measured in 10-90% range.
V
Resolution
R
ES
12
12
Bits
Integral Non-Linearity
3
3.
INL
+/- 4
+/- 5
LSB
4
4.
LSB = Least Significant Bit.
Differential Non-Linearity
DNL
+/- 0.9
+/- 1
LSB
3
Monotonicity
GUARANTEED
ADC internal clock
5
5.
Guaranteed by characterization.
f
ADIC
0.5
5
MHz
Conversion range
R
AD
V
SSA
V
DDA
V
Power-up time
t
ADPU
2.5
msec
Conversion time
t
ADC
6
t
AIC
cycles
6
6.
t
AIC
= 1/
f
ADIC
Sample time
t
ADS
1
t
AIC
cycles
6
Input capacitance
C
ADI
5
pF
6
Gain Error (transfer gain)
5
E
GAIN
1.00
1.10
1.15
Offset Voltage
5
V
OFFSET
+10
+230
+325
mV
Total Harmonic Distortion
5
THD
55
60
dB
Signal-to-Noise plus Distortion
5
SINAD
54
56
Effective Number of Bits
5
ENOB
8.5
9.5
bit
Spurious Free Dynamic Range
5
SFDR
60
65
dB
Spurious Free Dynamic Range
SFDR
65
70
dB
ADC Quiescent Current (both ADCs)
I
ADC
50
mA
V
REF
Quiescent Current (both ADCs)
I
VREF
12
16.5
mA
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