參數(shù)資料
型號(hào)： 56F802
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 16-bit Digital Signal Controllers
中文描述： 16位數(shù)字信號(hào)控制器
文件頁(yè)數(shù)： 15/40頁(yè)
文件大?。?/td> 2472K
代理商： 56F802
General Characteristics
56F802 Technical Data, Rev. 7
Freescale Semiconductor
15
Notes:
1.
Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application.
Determined on 2s2p thermal test board.
Junction to ambient thermal resistance, Theta-JA (
R
θ
JA
) was simulated to be equivalent to the JEDEC
specification JESD51-2 in a horizontal configuration in natural convection. Theta-JA was also simulated on
a thermal test board with two internal planes (2s2p where s is the number of signal layers and p is the number
of planes) per JESD51-6 and JESD51-7. The correct name for Theta-JA for forced convection or with the
non-single layer boards is Theta-JMA.
Junction to case thermal resistance, Theta-JC (R
θ
JC
), was simulated to be equivalent to the measured values
using the cold plate technique with the cold plate temperature used as the "case" temperature. The basic cold
plate measurement technique is described by MIL-STD 883D, Method 1012.1. This is the correct thermal
metric to use to calculate thermal performance when the package is being used with a heat sink.
2.
3.
Table 3-2 Recommended Operating Conditions
Characteristic
Symbol
Min
Typ
Max
Unit
Supply voltage, digital
V
DD
3.0
3.3
3.6
V
Supply Voltage, analog
V
DDA
3.0
3.3
3.6
V
ADC reference voltage
1
1.
VREF must be 0.3V below V
DDA
.
VREF
2.7
–
V
DDA
V
Ambient operating temperature
T
A
–40
–
85
°C
Table 3-3 Thermal Characteristics
6
Characteristic
Comments
Symbol
Value
Unit
Note
s
32-pin LQFP
Junction to ambient
Natural convection
R
θ
JA
50.2
°C/W
2
Junction to ambient (@1m/sec)
R
θ
JMA
47.1
°C/W
2
Junction to ambient
Natural convection
Four layer board (2s2p)
R
θ
JMA
(2s2p)
38.7
°C/W
1,2
Junction to ambient (@1m/sec)
Four layer board (2s2p)
R
θ
JMA
37.4
°C/W
1,2
Junction to case
R
θ
JC
17.8
°C/W
3
Junction to center of case
Ψ
JT
3.07
°C/W
4
I/O pin power dissipation
P
I/O
User Determined
W
Power dissipation
P
D
P
D
= (I
DD
x V
DD
+ P
I/O
)
W
Junction to center of case
P
DMAX
(TJ - TA) /R
θ
JA
W
7
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參數(shù)描述
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56F8025_07 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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