參數(shù)資料
型號: 73S1210F-EB-LITE
廠商: Maxim Integrated Products
文件頁數(shù): 105/126頁
文件大小: 0K
描述: BOARD EVAL 73S1210F LITE DOC/CBL
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
系列: *
73S1210F Data Sheet
DS_1210F_001
8
Rev. 1.4
1
Hardware Description
1.1
Pin Description
Table 1: 73S1210 Pinout Description
Pin Name
P
in
(68
Q
F
N
)
P
in
(44
Q
F
N
)
Ty
pe
Eq
u
iv
a
le
n
t
C
ir
c
u
it
*
Description
X12IN
10
9
I
MPU clock crystal oscillator input pin. A 1M
resistor is
required between pins X12IN and X12OUT.
X12OUT
11
10
O
MPU clock crystal oscillator output pin.
ROW(5:0)
0
1
2
3
4
5
21
22
24
33
36
37
I
Keypad row input sense.
COL(4:0)
0
1
2
3
4
12
13
14
16
19
O
Keypad column output scan pins.
USR(7:0)
0
1
2
3
4
5
6
7
35
34
32
31
30
29
23
20
22
21
20
19
18
17
14
13
IO
General-purpose user pins, individually configurable as
inputs or outputs or as external input interrupt ports.
SCL
5
6
O
I
2C (master mode) compatible Clock signal. Note: the pin
is configured as an open drain output. When the I2C
interface is being used, an external pull up resistor is
required. A value of 3K is recommended.
SDA
6
7
IO
Figure 28
I
2C (master mode) compatible data I/O. Note: this pin is bi-
directional. When the pin is configured as output, it is an
open drain output. When the I2C interface is being used,
an external pull up resistor is required. A value of 3K is
recommended.
RXD
17
11
I
Serial UART Receive data pin.
TXD
18
12
O
Serial UART Transmit data pin.
INT3
48
30
I
General purpose interrupt input.
INT2
49
31
I
General purpose interrupt input.
SIO
47
29
IO
IO data signal for use with external Smart Card interface
circuit such as 73S8010.
SCLK
45
28
O
Clock signal for use with external Smart Card interface
circuit.
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