2C Master Interface The 73S1210F includes a dedic" />
參數(shù)資料
型號： 73S1210F-EB-LITE
廠商： Maxim Integrated Products
文件頁數(shù)： 77/126頁
文件大?。?/td> 0K
描述： BOARD EVAL 73S1210F LITE DOC/CBL
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1
系列： *
73S1210F Data Sheet
DS_1210F_001
54
Rev. 1.4
1.7.12 I
2C Master Interface
The 73S1210F includes a dedicated fast mode, 400kHz I
2C Master interface. The I2C interface can read
or write 1 or 2 bytes of data per data transfer frame. The MPU communicates with the interface through
six dedicated SFR registers:
Device Address (DAR)
Write Data (WDR)
Secondary Write Data (SWDR)
Read Data (RDR)
Secondary Read Data (SRDR)
Control and Status (CSR)
The DAR register is used to set up the slave address and specify if the transaction is a read or write
operation. The CSR register sets up, starts the transaction and reports any errors that may occur. When
the I
2C transaction is complete, the I2C interrupt is reported via external interrupt 6. The I2C interrupt is
automatically de-asserted when a subsequent I
2C transaction is started. The I2C interface uses a 400kHz
clock from the time-base circuits.
1.7.12.1
I
2C Write Sequence
To write data on the I
2C Master Bus, the 80515 has to program the following registers according to the
following sequence:
1.
Write slave device address to Device Address register (DAR). The data contains 7 bits for the slave
device address and 1 bit of op-code. The op-code bit should be written with a 0 to indicate a write
operation.
2.
Write data to Write Data register (WDR). This data will be transferred to the slave device.
3.
If writing 2 bytes, set bit 0 of the Control and Status register (CSR) and load the second data byte to
Secondary Write Data register (SWDR).
4.
Set bit 1 of the CSR register to start I
2C Master Bus.
5.
Wait for I
2C interrupt to be asserted. It indicates that the write on I2C Master Bus is done. Refer to
information about the INT6Ctl, IEN1 and IRCON register for masking and flag operation.
Figure 10 shows the timing of the I
2C write mode:
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73S1210F-EB-LiteMS 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd Lite + Multi Sam RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1215F 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More
73S1215F-44IM/F 功能描述:8位微控制器 -MCU 80515 SoC w/USB & PINpad RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
73S1215F-44IM/F/P 功能描述:IC SMART CARD READER PROG 44-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:73S12xx 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件
73S1215F-44IMR/F 功能描述:8位微控制器 -MCU 80515 SoC w/USB & PINpad RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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