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6
Intel
82845G/82845GL/82845GV GMCH
Datasheet
4.1.1
4.1.2
4.1.3
System Memory Controller ..........................................................................107
4.2.1
DDR SDRAM Interface Overview...................................................107
4.2.2
SDR SDRAM Interface Overview ...................................................107
4.2.3
Memory Organization and Configuration........................................108
4.2.3.1
Configuration Mechanism for DIMMs..............................108
4.2.4
Memory Address Translation and Decoding...................................109
4.2.5
DRAM Performance Description.....................................................110
AGP Interface ..............................................................................................111
4.3.1
Overview.........................................................................................111
4.3.1.1
Lock Behavior..................................................................111
4.3.1.2
AGP Target Operations...................................................112
4.3.1.3
AGP Transaction Ordering..............................................113
4.3.1.4
AGP Electrical Characteristics ........................................113
4.3.1.5
Support for PCI-66 Devices.............................................113
4.3.1.6
4X AGP Protocol.............................................................114
4.3.1.7
Fast Writes ......................................................................114
4.3.1.8
AGP 1.5 V Connector......................................................114
4.3.2
PCI Semantic Transactions on AGP...............................................115
4.3.2.1
GMCH Initiator and Target PCI Operations.....................115
4.3.2.2
GMCH Retry/Disconnect Conditions...............................117
Integrated Graphics Device (IGD) ...............................................................119
4.4.1
3D Engine.......................................................................................120
4.4.1.1
Setup Engine...................................................................120
4.4.1.2
Scan Converter ...............................................................121
4.4.1.3
2D Functionality...............................................................121
4.4.1.4
Texture Engine................................................................121
4.4.1.5
Raster Engine..................................................................124
4.4.1.6
2D Engine........................................................................126
4.4.1.7
GMCH VGA Registers.....................................................127
4.4.1.8
Logical 128-Bit Fixed BLT and 256-Bit Fill Engine..........127
4.4.2
Video Engine ..................................................................................128
4.4.2.1
Hardware Motion Compensation.....................................128
4.4.2.2
Planes .............................................................................128
4.4.2.3
Cursor Plane ...................................................................128
4.4.2.4
Overlay Plane..................................................................129
4.4.3
Pipes...............................................................................................130
4.4.3.1
Clock Generator Units (DPLL).........................................130
4.4.4
Ports ...............................................................................................130
Display Interfaces........................................................................................131
4.5.1
Analog Display Port Characteristics................................................132
4.5.2
Digital Display Interface..................................................................133
4.5.2.1
Digital Display Channels – DVOB and DVOC.................133
4.5.2.2
Synchronous Display.......................................................135
Power and Thermal Management ...............................................................136
4.6.1
Power Management Support Overview..........................................136
4.6.2
Processor Power State Control.......................................................136
4.6.3
Sleep State Control.........................................................................136
4.6.4
Graphics Adapter State Control......................................................136
4.6.5
Monitor State Control......................................................................137
Clocking.......................................................................................................137
PSB Dynamic Bus Inversion...........................................................105
System Bus Interrupt Delivery ........................................................106
Upstream Interrupt Messages.........................................................106
4.2
4.3
4.4
4.5
4.6
4.7