參數(shù)資料
型號(hào)： 8427DY-02LFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： XO, clock
英文描述： 500 MHz, OTHER CLOCK GENERATOR, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
文件頁(yè)數(shù)： 1/23頁(yè)
文件大?。?/td> 1597K
代理商： 8427DY-02LFT
500MHZ, LOW JITTER LVCMOS/CRYSTAL-
TO-LVHSTL FREQUENCY SYNTHESIZER
ICS8427-02
IDT / ICS LVHSTL FREQUENCY SYNTHESIZER
1
ICS8427DY-02 REV A OCTOBER 13, 2006
GENERAL DESCRIPTION
The ICS8427-02 is a general purpose, six LVHSTL
output high frequency synthesizer and a member
of the HiPerClockS family of High Performance
Clock Solutions from IDT. The ICS8427-02 can
support a very wide output frequency range of
15.625MHz to 500MHz. The device powers up at a default out-
put frequency of 200MHz with a 16.6667MHz crystal inter-
face, and the frequency can then be changed using the serial
programming interface to change the M feedback divider and
N output divider. Frequency steps as small as 125kHz can
be achieved using a 16.6667MHz crystal and the output
divider set for
÷16. The low jitter and frequency range of the
ICS8427-02 make it an ideal clock generator for most
clock tree applications.
FEATURES
Six differential LVHSTL outputs
Selectable crystal input interface or TEST_CLK input
TEST_CLK accepts the following input types:
LVCMOS, LVTTL
Output frequency range: 15.625MHz to 500MHz
VCO range: 250MHz to 500MHz
Serial interface for programming feedback and output dividers
Supports SSC, -0.5% downspread. Can be enabled through
use of the serial programming interface.
Output skew: 100ps (maximum)
Cycle-to-cycle jitter: 50ps (maximum)
2.5V core/1.8V output supply voltage
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS
ICS
BLOCK DIAGRAM
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
XTAL_OUT
TEST_CLK
XTAL_SEL
VDDA
S_LOAD
S_DATA
S_CLOCK
MR
VDDO
FOUT2
nFOUT2
VDDO
FOUT3
nFOUT3
OE
GND
nFOUT5
FOUT5
V
DDO
nFOUT4
FOUT4
V
DD
TEST
XT
AL_IN
V
DD
VCO_SEL
FOUT0
nFOUT0
V
DDO
FOUT1
nFOUT1
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
ICS8427-02
OSC
VCO_SEL
XTAL_SEL
TEST_CLK
XTAL_IN
XTAL_OUT
OE
S_LOAD
S_DATA
S_CLOCK
VCO
PLL
FOUT0
nFOUT0
FOUT1
nFOUT1
FOUT2
nFOUT2
FOUT3
nFOUT3
FOUT4
nFOUT4
FOUT5
nFOUT5
TEST
÷ 1,
÷ 2,
÷ 4,
÷ 8,
÷ 16
CONFIGURATION
INTERFACE
LOGIC
÷ M
0
1
0
1
÷ 16
PHASE DETECTOR
MR
÷ 2
32-Lead VFQFN
5mm x 5mm x 0.75mm package body
K Package
Top View
PIN ASSIGNMENT
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