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參數(shù)資料
| 型號： | 8427DY-02LFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 1597K |
| 代理商： | 8427DY-02LFT |
IDT / ICS LVHSTL FREQUENCY SYNTHESIZER
17
ICS8427DY-02 REV A OCTOBER 13, 2006
ICS8427-02
500MHZ, LOW JITTER, LVCMOS/CRYSSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVHSTL output driver circuit and termination are shown in
Figure 9.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V
OH_MIN
/R
L
) * (V
DD_MAX
- V
OH_MIN
)
Pd_L = (V
OL_MAX
/R
L
) * (V
DD_MAX
- V
OL_MAX
)
Pd_H = (0.9V/50
) * (2V - 0.9V) = 19.8mW
Pd_L = (0.4V/50
) * (2V - 0.4V) = 12.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32.6mW
FIGURE 9. LVHSTL DRIVER CIRCUIT AND TERMINATION
V
DDO
V
OUT
RL
50
Q1
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