
Advanced 10/100 Repeater with Integrated Management
—
LXT9860/9880
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
93
PHY Port
Status
Auto Negotiate Link Partner Advertisement (port
1)
16
R
112
104
Auto Negotiate Link Partner Advertisement (port
2)
16
R
113
104
Auto Negotiate Link Partner Advertisement (port
3)
16
R
114
104
Auto Negotiate Link Partner Advertisement (port
4)
16
R
115
104
Auto Negotiate Link Partner Advertisement (port
5)
16
R
116
104
Auto Negotiate Link Partner Advertisement (port
6)
16
R
117
104
Auto Negotiate Link Partner Advertisement (port
7)
16
R
118
104
Auto Negotiate Link Partner Advertisement (port
8)
16
R
119
104
Auto Negotiate Expansion (port 1)
16
R
11A
105
Auto Negotiate Expansion (port 2)
16
R
11B
105
Auto Negotiate Expansion (port 3)
16
R
11C
105
Auto Negotiate Expansion (port 4)
16
R
11D
105
Auto Negotiate Expansion (port 5)
16
R
11E
105
Auto Negotiate Expansion (port 6)
16
R
11F
105
Auto Negotiate Expansion (port 7)
16
R
120
105
Auto Negotiate Expansion (port 8)
16
R
121
105
PHY Port Status Register (port 1)
16
R/W
122
105
PHY Port Status Register (port 2)
16
R/W
123
105
PHY Port Status Register (port 3)
16
R/W
124
105
PHY Port Status Register (port 4)
16
R/W
125
105
PHY Port Status Register (port 5)
16
R/W
126
105
PHY Port Status Register (port 6)
16
R/W
127
105
PHY Port Status Register (port 7)
16
R/W
128
105
PHY Port Status Register (port 8)
16
R/W
129
105
Table 45. Register Map (Continued)
Class
Register
Size
(Bits)
Access
1
Offset
(Hex)
Page
Ref.
1. R = Read only; W = Write only; R/W = Read/Write; LH = Latch High; LL = Latch Low; SC = Self Clearing.
2. If Register Clear bit is set to
‘
1
’
, then clearing of the associated bit is done by writing
‘
1
’
to it, otherwise this
register self clears upon read. Register Clear (Bit 11) is set through the Repeater Configuration Register.
(Refer to
Table 75 on page 109
.)