參數資料
型號: 9LRS4103BKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQCC32
封裝: ROHS COMPLIANT, PLASTIC, MLF-32
文件頁數: 1/15頁
文件大?。?/td> 188K
代理商: 9LRS4103BKLFT
ICS9LRS4103
IDT PC MAIN CLOCK
1520D—01/06/11
32-pin CK505 for Intel Systems
1
DATASHEET
Pin Configuration
Recommended Application:
Main clock for Intel 5/6 series desktop/embedded chipsets
Output Features:
1 - Low power push-pull CPU pair
1 - Low power push-pull SRC pair
1 - Low power push-pull 120MHz DISP/100MHz SRC pair
1 - Low power push-pull SATA/100MHz SRC pair
1 - Low power push-pull DOT96M pair
1 - 14.318M 3.3V REF output
Key Specifications:
CPU cycle to cycle jitter <85ps
SRC cycle to cycle jitter <85ps
PCIe Gen2 compliant
Features/Benefits:
CPU synchronous with SRC/CPU and SRC can be
interchanged for board routing
Default 0.5% down spread modulation/Reduces EMI
External 14.318M XTAL/allows precise frequency tuning
Fully integrated VREG for low power outputs/reduces
board space
Integrated 33ohm Rs on differential outputs/reduces
external component cost
SMBus Interface/unused outputs can be disabled
Table 1: CPU Frequency Select Table
FSLC
B0b7
CPU
MHz
SRC
MHz
REF
MHz
DOT
MHz
0 (Default)
133.33
1100.00
1. FS
LC is a low-threshold input.Please see VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
100.00
14.318 96.00
SEL_120M#
Pin# 21
Pin# 10/11
Pulled Low
120MHz
Pulled High
100MHz
SEL_SATA_NS#
Pin# 31
Pin# 14/15
0
100MHz_nonSS
1100MHz_SS
G
NDX
T
A
L
S
E
L_
SAT
A_
N
S
#
V
DDX
T
A
L
G
NDR
E
F
R
E
F
1
4.
318M
_
2
X
/F
S
LC
**
V
DDRE
F
14
M
C
KPW
R
G
D
/PD
#_
3.
3
V
DDCP
U
32 31 30 29 28 27 26 25
X1 1
24 CPUC0
X2 2
23 CPUT0
SMBCLK_3.3 3
22 GNDCPU
SMBDAT_3.3 4
21 SEL_120M#
VDD96 5
20 VDDSRC
DOT96T 6
19 SRC2C
DOT96C 7
18 SRC2T
GND96 817 GNDSRC
9 101112 131415 16
G
N
D
SSC
C
K
_S
SC
_D
ISP_
T
C
K
_SSC
_D
ISP
_C
VD
D
SSC
VD
D
SAT
A
SR
C
1T
/SA
T
A
_N
S_
T
SR
C
1C
/SAT
A_
N
S
_C
G
N
D
SAT
A
9LRS4103
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