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參數(shù)資料
| 型號(hào)： | 9LRS4103BKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC32 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-32 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 188K |
| 代理商： | 9LRS4103BKLFT |
IDT PC MAIN CLOCK
1520D—01/06/11
ICS9LRS4103
PC MAIN CLOCK
12
Byte 4 Output and Spread Spectrum Enable Register
Bit
Pin
Name
Description
Type
0
1
Default
7
CK_SSC_DISP_OE
Output enable for CK_SSC_DISP
RW
Output Disabled
Output Enabled
1
6
SATA/SRC1_OE
Output enable for SATA/SRC1
RW
Output Disabled
Output Enabled
1
5
SRC2_OE
Output enable for SRC2
RW
Output Disabled
Output Enabled
1
4
DOT96_OE
Output enable for DOT96
RW
Output Disabled
Output Enabled
1
3
Reserved
RW
-
1
2
CPU0_OE
Output enable for CPU0
RW
Output Disabled
Output Enabled
1
PLL1_SSC_ON
Enable PLL1's spread modulation
RW
Spread Disabled
Spread Enabled
1
0
PLL3_SSC_ON
Enable PLL3's spread modulation
RW
Spread Disabled
Spread Enabled
1
Byte 5 Reserved Register
Bit
Pin
Name
Description
Type
0
1
Default
7
Reserved
RW
-
0
6
Reserved
RW
-
0
5
Reserved
RW
-
0
4
Reserved
RW
-
0
3
Reserved
RW
-
0
2
Reserved
RW
-
0
1
Reserved
RW
-
0
Reserved
RW
-
0
Byte 6 Reserved Register
Bit
Pin
Name
Description
Type
0
1
Default
7
Reserved
RW
-
0
6
Reserved
RW
-
0
5
Reserved
RW
-
0
4
Reserved
RW
-
0
3
Reserved
RW
-
0
2
Reserved
RW
-
0
1
Reserved
RW
-
0
Reserved
RW
-
0
Byte 7 Vendor ID/ Revision ID
Bit
Pin
Name
Description
Type
0
1
Default
7
Rev Code Bit 3
R
X
6
Rev Code Bit 2
R
X
5
Rev Code Bit 1
R
X
4
Rev Code Bit 0
R
X
3
Vendor ID bit 3
R
0
2
Vendor ID bit 2
R
0
1
Vendor ID bit 1
R
0
Vendor ID bit 0
R
1
Byte 8 Device ID and Output Enable Register
Bit
Pin
Name
Description
Type
0
1
Default
7
Device_ID3
R
1
6
Device_ID2
R
0
5
Device_ID1
R
0
4
Device_ID0
R
0
3
Reserved
RW
-
0
2
Reserved
RW
-
0
1
Reserved
RW
-
0
Reserved
RW
-
0
Revision ID
Vendor specific
Table of Device identifier codes, used for
differentiating between CK505 package options,
etc.
32-pin device
Vendor ID
ICS is 0001, binary
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